Top Stories
AI Models Transform Defect Inspection And Review, But Can Fail To Scale
Majority of AI initiatives falter; synthetic data gaining traction due to limited real-world data.
Why Analog And Mixed-Signal Chips Resist Adaptive Test
Analog behavior is difficult to compress into simple pass/fail decisions that could reduce redundant coverage.
Co-Packaged Optics Testing Faces Steep Data Center Ramp
Scaling to tens of millions of CPO units per year requires the industry to first settle on automated, cost-effective methods for electrical and optical testing.
Video
Moving Defect Detection And Classification To The Edge
Explosion in defectivity requires much faster determination of critical and non-critical defects.
Sponsor Blogs
PDF Solutions’ Ming Zhang contends that advanced node manufacturing and heterogeneous integration require partnerships that span the full value chain, in What I Learned At The 2026 GSA Tech Summit: The Future Of Semiconductor Collaboration Is Full Stack.
Onto Innovation’s Keira Lei argues that AI must operate as a verifiable engineering collaborator where outputs are transparent, traceable, and subject to human interpretation and refinement, in Effective UX/UI Is A Critical Link Between AI Insights And Yield Improvement.
Synopsys’ Ash Patel and Shubharthi Datta and Cisco’s Chuanyun Fan outline how PCI Express can enable faster, more scalable, and lifecycle-wide testing while conserving limited pins, in High-Speed Manufacturing And In-Field Scan Test Access Via PCI Express For GPIO-Limited SoCs.
Siemens EDA’s Peter Orlando emphasizes that in-field testing is essential for quickly detecting emerging defects throughout a device’s operational lifespan, in Test Anything, Anywhere, Anytime.
Nordson’s Chris Rand details how HBM’s 3D architecture — stacked DRAM dies interconnected via TSVs — delivers exceptional bandwidth and efficiency, but introduces new inspection and quality-assurance challenges, in Enhancing High Bandwidth Memory (HBM) Reliability With 3D X-ray Inspection.
Sponsor White Papers
2026 ASMC – Building the Core Pillars for AI in Semiconductors
A roadmap for operationalizing AI at scale and achieving sustained competitive advantage across the semiconductor lifecycle.
Advancements in Corona Noncontact Metrology Tools, CnCV, for Industrial WBG Wafer Testing and Electrical Defect Related Yield Prediction
Metrology for defect screening, yield learning, and process control in WBG manufacturing.
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