Special Report
EDA Challenges Machine Learning
Many tasks in EDA could be perfect targets for machine learning, except for the lack of training data. What might change to fix that?
Top Stories
Pushing DRAM’s Limits
Plumbing problems of the past continue to haunt chipmakers as gap grows between processor and memory speed.
Accounting For Power Earlier
Examining the power impact of design decisions much earlier can have a big effect on what else a chip can do.
Videos
Tech Talk: EM Crosstalk
An issue previously confined to analog circuits has become a critical design consideration for digital designs at 10/7nm.
Tech Talk: Substrate Noise Coupling
How noise can impact the sensitive analog parts of a design, where it comes from, and what to do about it.
Blogs
Editor in Chief Ed Sperling contends that analog engineers finally may get some empathy from the digital side, in Noise At 7nm And Beyond.
Synopsys’ Biswanath Tayenjam and Licinio Sousa explain how hardware inline encryption in eMMC and UFS works and why it’s important, in Security For Android-Based Ecosystem With Mobile Storage IP.
Rambus’ Niraj Mathur observes that while PCIe 4.0 took a long time to get here, there are big benefits ahead, in Optimizing The Data Center With PCI Express 4.0.
Mentor’s Ron Squiers looks at co-modeling technology, its impact on verification and validation, and what are the best tradeoffs, in Co-Modeling Takes Emulation To The Next Level: System-Of-Systems.
Helic’s Magdy Abadir argues that most of the commercial electromagnetic solvers and extraction engines are not suitable for analyzing EM crosstalk in a typical SoC design, in SoC Electromagnetic Crosstalk: From A Tool Perspective.
