How noise can impact the sensitive analog parts of a design, where it comes from, and what to do about it.
Roland Jancke, head of the department for design methodology for the Fraunhofer’s Engineering of Adaptive Systems Division, talks with Semiconductor Engineering about the impact of substrate noise coupling on reliability of chips and how to deal with this issue.
Chips will cost more to design and manufacture even without pushing to the latest node, but that’s not the whole story.
Semiconductor devices face many hazards before and after manufacturing that can cause them to fail prematurely.
Technology adds more granularity, but starting point for design shifts as architectures cope with greater volumes of data.
GlobalFoundries’ decision to put 7nm on hold is raising concerns across the mil/aero industry.
Different perspectives and needs create friction as more advanced electronics are added into vehicles.
Interest in the open-source ISA marks a significant shift among chipmakers, but it will require continued industry support to be successful.
Using the Von Neumann architecture for artificial intelligence applications is inefficient. What will replace it?
Slowdown due to impact on timing, and dependencies between power, thermal and timing that may not be caught by signoff tools.
Assessing the reliability of a device requires adding more physical factors into the analysis, many of which are interconnected in complex ways.
Semiconductor devices face many hazards before and after manufacturing that can cause them to fail prematurely.
Old solutions don’t necessarily work anymore, particularly at advanced nodes and ultra-low voltage.
Understanding aging factors within a design can help reduce the likelihood of product failures.
How Arm sees its role in emerging segments of tomorrow’s compute challenges.
 |
 |
 |
 |
 |
 |
 |
 |
 |
 |
Leave a Reply