Top Stories
What’s Missing In 2.5D EDA Tools
While it’s possible to create interposer-based systems today, the tools and methodologies are incomplete, and there is a mismatch with organizations.
Interconnects Essential To Heterogenous Integration
Chiplet communication will be impossible without interconnect protocols.
Engineers Or Their Tools: Which Is Responsible For Finding Bugs?
As chips become more complex, the tools used to test them need to get smarter.
Optimizing EDA Cloud Hardware And Workloads
Algorithms written for GPUs can slice simulation time from weeks to hours, but not everything is optimized or benefits equally.
Chiplet IP Standards Are Just The Beginning
Data and protocol interoperability standards are needed for EDA tools, and there are more hurdles ahead. Customized chiplets will be required for AI applications.
Blogs
Technology Editor Brian Bailey wonders if careers are like adjectives and have to move along a certain path, in Career Transitions.
Arteris’s Frank Schirrmeister shows that the growing number of chips in vehicles puts a spotlight on data transport architectures, in Automotive Semiconductor March Madness 2024.
Movellus’ Barry Pangrle explains why real-time values are essential for identifying future variations in voltage and temperature, in Staying Within The Margins.
Synopsys’ Rimpy Chugh advises how to avoid surprises in layout-level or signoff static timing analysis, in Rapid Timing Constraints Signoff With Automated Constraint Management.
Siemens’ David Abercrombie advocates for addressing the verification challenges posed by concurrent design processes earlier in the design flow, in A New Strategy For Successful Block/Chip Design-Stage Verification.
Keysight’s Bernard Ang presents a way to enable efficient testing in the lab, on the production floor, and out in the field, in Data Acquisition Software: The Brains Behind The Hardware.
Cadence’s Steve Brown looks at a chiplet reference design built specifically for ADAS, in Jumpstarting The Automotive Chiplet Ecosystem.
Sponsor White Papers
Everything You Need to Know About Wi-Fi 7
The key features and testing challenges of Wi-Fi 7 (IEEE 802.11 be).
Leveraging Automotive Chip Design Techniques For Space-Borne Applications
Automotive applications share many of the same challenges as space-bound applications. How aspects of automotive chip design translate well.
Sea Of Processors Use Case
How a high-performance SoC uses clock generation module (CGM) with distributed clocking.
Cadence Cerebrus In SaaS And Imagination Technologies Case Study
Using an AI tool to boost productivity in chip design.
The Data Crisis Is Unfolding — Are We Ready?
With the advent of AI, updating connectivity will secure the future of data infrastructure.
Navigating Design Challenges
Block/chip design-stage verification.
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