Top Stories
Software-Defined Hardware Architectures
Hardware-software co-design is established, but the migration to multiprocessor systems adds many new challenges.
Chiplet Planning Kicks Into High Gear
Issues involving design, manufacturing, packaging, and observability all need to be solved before this approach goes mainstream for many applications.
Chip Design CEO Outlook
Challenges and opportunities involving heterogeneous integration, geopolitics, and AI.
IP Becoming More Complex, More Costly
The IP industry is undergoing several transformations that will make it difficult for new companies to enter the market, and more expensive for those that remain.
Blogs
Technology Editor Brian Bailey contends that while the industry claims to be concerned about power, it only does so for secondary reasons, and massive levels of waste go unaddressed, in A Highly Wasteful Industry.
Siemens’ Patrick Carrier explains why understanding current distribution is essential to minimize waste and avoid overdesigned via arrays, in Stitching Together A Multi-Layer PCB PDN.
Movellus’ Barry Pangrle points to supercomputer rankings to see efficiency and performance gains, in Top500: Frontier Is Still On Top.
Cadence’s Paul McLellan looks at technology transitions from NMOS to gate-all-around, in The History Of CMOS.
Expedera’s Paul Karazuba digs into power consumption, latency, and privacy concerns for NPUs included in application processors, in An Ideal Always-Sensing Subsystem Architecture.
Renesas’ Kayoko Nemoto sees the exponential growth of Internet traffic in industrial automation shortening the life cycle of core networking technologies, in Connectivity Challenges In Industry 4.0.
Codasip’s Mike Eftimakis examines combining different levels of configuration and customization to meet PPA goals, in No One-Size-Fits-All Approach To RISC-V Processor Optimization.
NI’s Alejandro Escobar Calderon and Gerardo Orozco lay out the tradeoffs for moving more data at higher wireless frequencies, in How Sub-THz Will Impact The Future Of 6G.
Video
The Impact Of ML On Chip Design
What reinforcement learning brings to the table and where it can be used.
Challenges In Writing SDC Constraints
Generation, verification, and management of constraints.
Sponsor White Papers
Distribution Of Currents In Via Arrays
How to address the challenge of distributing current around a printed circuit board.
Architectural Considerations For Compute-In-Memory In AI Inference
A new type of memory management solution.
A Formal-Based Approach For Efficient RISC-V Processor Verification
Efficiently target bugs that would be out of reach for simulation.
Advanced RISC-V Verification Methodology Projects
An outline of open standards and methodologies that assist in both the efficiency and support for the growing community of RISC-V adopters.
Improving Network Security Threat Detection
Enhancing that traffic with context makes it faster for security analysts to get the most from their tools.
Computational Imaging Craves System-Level Design And Simulation Tools To Leverage Disruptive AI In Embedded Vision
Design tools for the entire computational imaging pipeline can pave the way for powerful and affordable imaging systems, from assisted driving systems, computer vision-based robots, or high-quality images for mixed reality.
Celsius EC Solver
Key features of electronics cooling software that analyze airflow, temperature, and heat transfer in electronic assemblies and enclosures.
Smallest Thinnest Power Modules For Data Center Optical Modules
Demand has increased for highly integrated, small form factor, low profile yet thermally superior and electrically efficient power supply modules to support high data rates and large amount of data transfer.
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