Special Report
Bumps Vs. Hybrid Bonding For Advanced Packaging
New interconnects offer speed improvements, but tradeoffs include higher cost, complexity, and new manufacturing challenges.
Top Stories
Fan-Out Packaging Options Grow
Once viewed as a low-cost IC packaging option, fan-out is going mainstream and upstream.
Finding, Predicting EUV Stochastic Defects
Unusual effects at 5/3nm, including fewer defects with double patterning.
Thinner Channels With 2D Semiconductors
Research into new materials booms as the number of manufacturing challenges increases at future nodes.
Geopolitical And Economic Outlook For Chips And Equipment
Supply-demand imbalances, new markets for advanced chips, and how a dual supply chain could disrupt the chip industry.
Blogs
Executive editor Mark LaPedus finds some surprises in a SEMI analyst fab forecast, in More Fabs Seen In Chip Boom.
Coventor’s Jeonghoon (James) Kim advocates a well-defined process library that allows known good processes to be quickly tested to assist in defect identification and correction, in Using Virtual Process Libraries To Improve Semiconductor Manufacturing.
Amkor’s Yoshio Matsuda explains how various optimizations to the package were required to achieve automotive grade, in Qualifying Exposed Pad TQFP For AEC-Q006 Grade 0.
Calibra’s Jan Willis looks at the tradeoffs involved in defining a new curvilinear data format to reduce file sizes, in Developing A New Curvilinear Data Format.
SEMI’s Sungho Yoon urges wafer suppliers to boost capacity as market demand and average selling prices continue to improve, in Greenfield Projects Needed To Meet Silicon Wafer Demand.
White Papers
High Thermal Die-Attach Paste Development For Analog Circuits
Process Model Calibration: The Key To Building Predictive And Accurate 3D Process Models
High-Temperature-Stable, Spin-On Carbon Materials For High-Aspect-Ratio Gap-Fill Applications
Replacement Gate High-K/Metal Gate NMOSFETs Using A Self-Aligned Halo-Compensated Channel Implant
