Top Stories
Designing Chips For Test Data
Getting the data out is only part of the problem. Making sure it’s right is another challenge altogether.
Why Wafer Bumps Are Suddenly So Important
As density increases, so does the risk of chip failures.
Who Owns In-Chip Monitoring Data?
Rules are still being formulated even though the technology is already deployed.
Blogs
Synopsys’ Rahul Singhal advises preserving the functional power intent of the design and staying within the chip power budget during testing, in Power-Aware Test: Addressing Power Challenges In DFT And Test.
Onto Innovation’s Vamsi Velidandla, Zhuo Chen, and Zhihui Jiao, and Micron’s John Hauck and Joshua Frederick examine inline CMP process control with fast throughput and higher productivity, in Reducing Rework In CMP: An Enhanced Machine Learning-Based Hybrid Metrology Approach.
Siemens’ Richard Oxland observes that system-wide functional analysis helps optimize many-core SoCs and helps get them to market on time, in Better Optimization For Many-Core AI Chips.
Advantest’s Dave Armstrong, Davette Berry, and Craig Snyder show how to optimize test efficiency and part quality by transferring some test steps from final test and burn-in toward system-level test, in SLT Enables Test Content To Shift Right.
FormFactor’s David Viera explains how to get lower power optical transceivers ready for the data center, in Production Testing For Silicon Photonics Wafers.
Sponsor White Papers
Extremely Large Exposure Field With Fine Resolution Lithography Technology To Enable Next-Generation Panel Level Advanced Packaging
How this new technology will address the challenges of large package size processes.
Multi-Layer Deep Data Performance Monitoring And Optimization
A comprehensive solution for optimizing performance in development and production and using predictive maintenance in the field.
Characterization Of Micro-Bumps For 3D-IC Wafer Acceptance Tests
Custom DC positioners with theta-X planarizing capability and true Kelvin probes have allowed for successful demonstration of consistent and repeatable test results in fully automatic micro-bump wafer acceptance tests.
Residual Stress With EIGER2 R 500K
X-ray diffraction detects changes in atomic spacing from strained materials.
Harness System-Level Data To Optimize Many-Core AI And ML Chips
Issues and solutions for SoC validation and optimization.
In-Line Airborne Particle Sensing Supports Faster Response To Contamination Excursions
In-line particle sensing provides continuous, real-time monitoring, shortening response times and potentially limiting damage to work-in-progress.
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