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Production Testing For Silicon Photonics Wafers

Getting lower power optical transceivers ready for the data center.

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Worldwide data centers and networks for communications currently consume about 8% of the Earth’s total energy produced. To meet the increasing demands for cloud storage, computing, and various emerging applications such as artificial intelligence, genomics revolution, and video transcoding, hyperscale data centers are being built around the world at an accelerated pace, with analysts predicting up to 20% of Earth’s total power output consumed in 2030, as shown in the chart below. Optical fiber communications within data centers and the use of Silicon Photonics (SiPh) to implement these optical transceivers present a very attractive option, drastically reducing power consumption, cost and size of these transceiver modules.

In addition, the mature silicon CMOS processing technologies and advanced 3D-IC packaging technologies both offer an established high-yield production solution to fabricate such silicon-based optical transceivers. For effective heterogeneous integration and packaging of these silicon-based optical transceivers, individual functional chips such as logic, photonics, and laser must all be tested prior to stacking and packaging.

FormFactor’s Dr. Choon Beng Sia with co-authors from GlobalFoundries Singapore presented a technical paper on production testing of silicon photonics wafers at the 33rd IEEE International Conference on Microelectronic Test Structures (ICMTS). In the paper, they discussed key wafer test challenges, including:

  • Optimizing the test setup
  • Correlating results of wafer-level and final product tests
  • Layout rules
  • Test pads standardization
  • Test automations to satisfy high throughput production test requirements

In the paper, the authors concluded that an optical transceiver implemented with the silicon photonics technology is key in reducing the energy needed to operate data centers around the world. Accurate and efficient wafer-level photonics tests are crucial for KGD tests to enable 3D-IC integration as well as to reduce product time-to-market. Optimizing the optical test setup, correlating results between wafer-level and final product tests, layout standardization as well as test architecture automation, are all critical in satisfying wafer acceptance production test requirements and they have been established and successfully demonstrated.

Download the paper here: Test Setup Optimization and Automation for Accurate Silicon Photonics Wafer Acceptance Production Tests (PDF).



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