Technical Paper Home

Architectures

• Computer Architecture Extending The Von Neumann Model With A Dedicated Reasoning Unit For Native Artificial General Intelligence (TU Munich, Pace U.)

  Published on July 23, 2025

• Largest High-Quality Verilog Dataset for LLM Fine-Tuning (Univ. of Florida)

  Published on July 22, 2025

• Fault-Free Matrix for Analog Hardware (The Univ. of Hong Kong, Univ. of Oxford, Hewlett Packard Labs)

  Published on July 22, 2025

• HW/SW Co-Design Toolset for RISC-V (Tampere Univ.)

  Published on July 21, 2025

• Efficient Failure-Detection Methods for GPU Control-Logic (Hitachi, Osaka Univ., Kyoto Univ.)

  Published on July 21, 2025

• DL Compiler Framework For More Efficient Inter-Core Connected AI Chips (UIUC, Microsoft)

  Published on July 21, 2025

• Skeletal Security Architecture For Providing Systematic Security Insertion And Assurance In SoC Designs (University of Florida)

  Published on July 21, 2025

• Examination Of Thermal Issues Related to Hybrid Bonding of 3D-Stacked HBM

  Published on July 16, 2025

• Physics-Based ASICs (Normal Computing et al.)

  Published on July 15, 2025

• Analysis of RISC-V CPU Fuzzers via Automatic Bug Injection (ETH Zurich)

  Published on July 15, 2025
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