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• A Study Of LLMs On Multiple AI Accelerators And GPUs With A Performance Evaluation

  Published on October 19, 2023

• FeFET Multi-Level Cells For In-Memory Computing In 28nm

  Published on October 19, 2023

• Four Vertical Power Delivery Architectures For Emerging Packaging and Integration Platforms (UIC)

  Published on October 16, 2023

• Embedded Automotive Platforms: Evaluating Power And Performance Of Image Classification And Objects Detection CNNs 

  Published on October 16, 2023

• A Formal Verification Method To Detect Timing Side Channels In MCU SoCs

  Published on October 11, 2023

• LLM-Aided AI Accelerator Design Automation (Georgia Tech)

  Published on September 28, 2023

• Neuromorphic Hardware Accelerator For Heterogeneous Many-Accelerator SoCs

  Published on September 28, 2023

• SRAM-Based IMC For Cryogenic CMOS Using Commercial 5 nm FinFETs

  Published on September 27, 2023

• Photonic-Electronic SmartNIC With Fast and Energy-Efficient Photonic Computing Cores (MIT)

  Published on September 19, 2023

• 3D-Integrated Neuromorphic Hardware With A Two-Level Neuromorphic “Synapse Over Neuron” Structure

  Published on September 19, 2023
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