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Amkor Technology
Enabling the Future
Amkor Technology is seeking a Senior Staff Engineer, Signal and Power Integrity with a strong technical background and experience in signal and power integrity related to semiconductor IC package design. The opportunity involves working directly with our customers, package design engineers, simulation engineers, business units, R&D, and assembly.
• Work with IC package design engineers to provide design solutions for high-speed and low speed signals, clocks, power delivery signals, and power and ground planes
• Provide routing guidelines for high-speed, low-speed, power signals, power and ground planes from bumps to balls
• Thorough understanding of the SI and PI associated with bump signals/ground patterns and ability to optimize the balls signal/ground placement to improve the performance
• Provide package layer counts, stack ups, materials, impedance control, test impedance targets, and optimizing net assignments for signals
• Perform SIPI simulation/optimization to make sure critical signals meet their required specifications
• Signal integrity analysis of frequency and time domain simulations for high-speed signals and low speed signals following specifications
• Optimize single ended or differential Insertion loss, return loss, X-talk, and power sum X-talk for differential signaling groups and protocols
• IR_DROP simulation for the power rails from bumps to balls
• AC frequency sweep simulation to optimize the high RLC traces to the lower by achieving low resistance and inductance traces
• Power plane resonance to measure the resonances of the package plans
• PDN frequency domain and transient time domain analyses
• Capable of determining component location, count, and specifications required to meet performance requirements
• Work as a team with other signal/power integrity engineers and design engineers to develop electrical design guidelines to optimize package designs
Qualifications:
• Bachelor’s Degree in Electrical Engineering with at least 10 years of relevant SIPI experience
• Strong background in the application of Electromagnetics and High-Speed Transmission Line principles related to signal and power integrity
• Proficiency in time and frequency domain modeling and use of 2D and 3D simulation tools such as Ansys HFSS, SIwave, Cadence/Sigrity, ADS
• Experience with IC package layout tools such as Cadence APD, SiP
• Experience/Knowledge of next generation advanced high speed package design/simulation to meet electrical performance
• Experience of high-speed bus design compliance such as DDR5, PCIe5, 56 GBPS and 112 GBPS PAM4
• Demonstrated and effective verbal/written communication skills
• Excellent analytical and problem-solving skills
• Ability to perform as an individual contributor and team player
• Strong interpersonal skills and customer service experience to work professionally with our customers, global design & simulation teams and EDA tool vendors
• Master’s Degree or Ph.D. in Electrical Engineering with 10+ years’ experience is preferred
• Track record of working successfully in cross-functional development teams across the globe is desired
• Familiarity with Outsourced Assembly and Test (OSAT) industry and understanding of substrate manufacturing and assembly processes is a plus
