Job Responsibility
Protium is leading product in FPGA Emulation/Prototyping domain. This role is to design, verification, timing closure and hardware validation of the FPGA IPs.
- Developing field-programmable gate array intellectual properties (FPGA IPs) for Protium platform, including design, verification, integration, timing closure, documentation and releasing the IPs to end users;
- Working on FPGA IP Design, Verification/Simulation, Timing closure, Validation of IP on the hardware;
- Enhancing current IPs as well as developing new IPs.
- Debug and fix internal regression failures for FPGA IPs.
- Documentation of IPs
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