Rambus
As a Senior Principal Engineer, the candidate will be reporting to VP of Engineering and is a Full Time position. The candidate will be part of an Architecture team for the new high performance Analog devices such as Register Clock Driver ((M)RCD), Data Buffer ((M)DB), Clock Driver (CKD) and DDR5 PMICs as well as other new memory technologies to help grow the business for the Memory Interface Chip Business Unit.
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