EM in advanced packages; what works best for chiplets; ALD; process drift; auto chiplets; SiC, GaN breakdown voltage; chiplet interconnects; faster DRAM; supply chain management; curvilinear mask shapes and more.
Architecting chips for HPC; memory on logic tradeoffs; AI/ML reduces IR drop; linear drive optics may lower latency; photonics challenges; chiplets and power delivery; trusted electronics; superconducting ICs; AI 2.0, memory; LPDDR5X; running on star power; MIPI at edge; server uploads; hybrid architecture and more.
Test collaboration grows; imaging systems for inspection; data variability strategies; ML to reduce defects; PVT monitoring for GAA; Wi-Fi 7 test challenges; locally tuning silicon photonic devices; measuring hole profiles in DRAM.
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