Fox began his career at GTE Laboratories and served in many roles throughout his 13 year tenure. He later went on to found Silc Technologies, one of the first companies to offer language-based synthesis tools for ASICs, which he later sold to Racal-Redac and assumed the role of vice president of engineering. At Racal-Redac, his responsibilities included specification and development of high-level design and logic synthesis tools for ASICs.
Fox was director of system verification and FPGA design engineering at Viewlogic Systems Inc., where he was responsible for establishing strategic directions and implementing system design verification and synthesis products focused on the FPGA market segment.
He joined Altera in 1998 and has held several positions there, most recently Principle Verification Architect.
Fox holds BSEE and MSEE degrees from State University of New York at Stony Brook. He was also a fellow at Massachusetts Institute of Technology’s Center for Advanced Engineering Study.
