Born 1948 in Maryland, Washington D.C., Sanguinetti has a Ph.D. in Computer and Communication Sciences from the University of Michigan, Ann Arbor. After working for DEC, Amdahl, ELXSI, Ardent, and NeXT computer manufacturers, he founded Chronologic Simulation in 1991. He was the principal architect of VCS, the Verilog Compiled Simulator. It was acquired by Viewlogic.
Due to a 4-year non-compete agreement, Sanguinetti went off to try and develop a language similar to Verilog, but for the mechanical world.
In 1998 Sanguinetti started experimenting with creating a Verilog compiler using a C++ library and then got together with Andy Goodrich and Randy Allen to start C2 Design Automation. The company changed its name to CynApps and began selling C-based synthesis and RTL translation tools. They distributed an open-source C++ class library called Cynlib, which competed with SystemC. CynApps merged with Chronology to become Forte Design Systems which was acquired by Cadence in 2014.
Sanguinetti is a 2011 ACM Fellow for contributions to hardware simulation.
John has been an investor, director or adviser to many EDA companies.
The computer history museum has a complete history of Sanguinetti.
https://www.computerhistory.org/collections/catalog/102702042
