Senior Vice President & CTO, Altera Corporation. Managed all R & D for Altera’s FPGA architectures, HardCopy ASICs, software, embedded processors and IP.. Served as VP of R & D at Cadence, Mentor Graphics and Silicon Compiler Systems
Co-founder of Silicon Design Labs in 1984
Started career at Bell Labs in 1978
M.S. and PhD in EE from U. of Minnesota and Dipl. Eng. from the University of Belgrade
