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August 2019


RF Design Challenges for PCB: Are you ready for 5G for IoT?

August 14 @ 11:00 am12:00 pm PDT

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RF Design Challenges for PCB: Are you ready for 5G for IoT?

August 14 @ 2:00 pm3:00 pm BST

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Jumpstart your testbench development with Questa Verification IP

August 21 @ 8:30 am PDT

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A Model-Based Safety Flow for Automotive Semiconductor Products in Battery Management Applications

August 28 @ 10:00 am11:00 am EDT

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September 2019


Make in India – Employ Tanner AMS on your design for the SCL 180 nm PDK

September 4 @ 11:00 am12:00 pm IHST

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Firewalling Threats for Connected Cars

September 10 @ 3:00 pm4:00 pm CEST

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Verifying Mixed-Signal Low-Power Behavior with Xcelium Simulation

September 12 @ 9:30 am10:30 am BST

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What You Can Do While the Formal Run is In-Progress

September 17 @ 8:00 am9:00 am PDT

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Should I Kill My Formal Run – Part 1: What You Can Do While the Formal Run is In-Progress

September 17 @ 8:00 am9:00 am PDT

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Should I Kill My Formal Run – Part 2: What You Can Do Beforehand to Avoid Trouble and Set Yourself Up for Success

September 24 @ 8:00 am9:00 am PDT

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HLS — What, How and Why Now?

September 24 @ 10:00 am11:00 am PDT

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Visualizer and Optimizing Questa Performance

September 25 @ 8:30 am9:30 am PDT

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Xpedition Product Update for VX.2.6

September 25 @ 9:00 am10:00 am PDT

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AI Accelerator Design with Stratus HLS

September 25 @ 9:00 am10:00 am EDT

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Do not let Integrated circuit power demands heat up your board

September 25 @ 11:00 am11:45 am IST

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Color for Directors: Answering Difficult Engineering Questions

September 26 @ 10:00 am10:45 am PDT

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October 2019


Using High-Level Synthesis to Accelerate Computer/Machine Vision Applications

October 1 @ 10:00 am11:00 am PDT

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Building Better Designs Using 1D/3D Simulation

October 3 @ 10:00 am10:45 am PDT

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How to plan a DO-254 compliant verification process for FPGA designs (US)

October 3 @ 11:00 am12:00 pm PDT

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Implementing Machine Learning Hardware Using High-Level Synthesis

October 8 @ 10:00 am11:00 am PDT

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From HLS Component to a Working Design

October 15 @ 10:00 am11:00 am PDT

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How to Use IP to Accelerate Your Functional Safety Compliance for Automotive SoCs

October 16 @ 10:00 am11:00 am PDT

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Learn How to Speed Up Your Simulations with More Powerful Servers

October 16 @ 11:00 am12:00 pm EDT

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Cloud Best-Practices for Semiconductor Design and Verification:

October 17 @ 10:30 am11:15 am PDT

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Pushing the Envelope for AI and ADAS with GDDR6

October 22 @ 9:00 am10:00 am PDT

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Overcoming Design Challenges with Electrical-Thermal Co-Simulation

October 22 @ 11:15 am11:45 am PDT

|Recurring Event (See all)

An event every day that begins at 11:15 am, repeating until October 23, 2019

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STDF, Standard Test Data Format, the most common tester datalog format in the semiconductor industry

October 22 @ 2:30 pm3:00 pm GMT

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STDF, Standard Test Data Format, the most common tester datalog format in the semiconductor industry

October 22 @ 6:30 pm7:00 pm GMT

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STDF, Standard Test Data Format, the most common tester datalog format in the semiconductor industry

October 23 @ 7:00 am7:30 am GMT

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Figuring out the Fundamentals of Functional Safety

October 23 @ 10:00 am11:00 am EDT

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Overcoming Design Challenges with Electrical-Thermal Co-Simulation

October 23 @ 11:15 am11:45 am PDT

|Recurring Event (See all)

An event every day that begins at 11:15 am, repeating until October 23, 2019

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Why Analog IC designers are migrating from Traditional AMS flows

October 24 @ 10:00 am11:00 am PDT

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Achieve Layout Success with Custom Design Planner and Design Intent

October 29 @ 8:00 am9:00 am PDT

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Siemens: Application-Specific Neural Network Inference

October 29 @ 10:00 am11:00 am PDT

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Smart Data: Protecting, Monitoring & Cataloging Your Sensitive IP Assets In A Global Environment

October 30 @ 8:00 am9:00 am PDT

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Getting the Bugs Out with Conformal EC

October 30 @ 9:00 am10:00 am PDT

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November 2019


Customers’ Experience Using HLS for Image Processing and AI: Xperi® and SeeCubic®

November 5 @ 10:00 am11:00 am PST

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Speed Development of Safe Autonomous Driving

November 5 @ 5:00 pm6:00 pm CET

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MultiMechanics ANSYS Plugin for Optimization

November 6 @ 8:00 am9:00 am PST

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Harnessing Silicon-Based Security to Achieve a Competitive Advantage

November 7 @ 11:00 am12:00 pm PST

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Multi-Engine MDV: Get the Best of Both Worlds

November 12 @ 7:30 am8:30 am PST

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Cummins’ View on Speed and Agility Enabled by High Performance Computing

November 12 @ 8:00 am9:00 am PST

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Getting Feedback in Minutes: Using a Virtual ECU to Accelerate Automotive Application Software Development

November 12 @ 10:00 am11:00 am PST

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HLS 101 ⁠— What Every RTL HW Design Team Needs to Know

November 12 @ 10:00 am11:00 am PST

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