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Technical Paper Home

Architectures

  • Efficient TNN Inference on RISC-V Processing Cores With Minimal HW Overhead

    Published on June 10, 2024
  • CAM-Based CMOS Implementation Of Reference Frames For Neuromorphic Processors (Carnegie Mellon U.)

    Published on May 31, 2024
  • A HW-Aware Scalable Exact-Attention Execution Mechanism For GPUs (Microsoft)

    Published on May 21, 2024
  • Ferroelectric Memory-Based IMC for ML Workloads

    Published on May 21, 2024
  • DRAM Microarchitectures And Their Impacts On Activate-Induced Bitflips Such As RowHammer 

    Published on May 19, 2024
  • Competitive Open-Source EDA Tools

    Published on May 19, 2024
  • Ultra Energy-Efficient HW Platform For Neuromorphic Computing Enabled By 2D-TMD Tunnel-FETs (UC Santa Barbara)

    Published on May 7, 2024
  • New Ways To Optimize GEMM-Based Applications Targeting Two Leading AI-Optimized FPGA Architectures

    Published on May 7, 2024
  • Optimizing Offload Performance In Heterogeneous Multi-Processor SoCs (ETH Zurich)

    Published on May 3, 2024
  • Merging Power and Arithmetic Optimization Via Datapath Rewriting (Intel, Imperial College London)

    Published on April 19, 2024
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