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Technical Papers

• Statistical Model Checking As An Evaluation Tool of Microarchitectural Side Channels (Duke, Harvard, Univ. of Florida)

  Published on October 17, 2025

• Gallium-Based SMP for High-Performance Cu-to-Cu Bonding (National Cheng Kung Univ.)

  Published on October 16, 2025

• Grouping Complex Wafer Defect Patterns Into Meaningful Clusters (Oregon State Univ., Micron)

  Published on October 15, 2025

• Microelectronics and Advanced Packaging Technologies Roadmap 2.0 (SRC)

  Published on October 14, 2025

• System-HW Co-Design Approach Combines Mono3D DRAM, NMP, and GPU Acceleration (UCSD, Georgia Tech, UIUC, Illinois Tech)

  Published on October 14, 2025

• Heterogeneous System With Specialized HW For Disaggregated LLM Inference (Princeton Univ., Univ. of Washington)

  Published on October 14, 2025

• Comprehensive Performance Study of Zero-Knowledge Proofs on GPUs (Univ. of Michigan)

  Published on October 14, 2025

• On-Package Memory With UCIe To Improve Bandwidth Density And Power Efficiency (AMD, Intel Corp.)

  Published on October 10, 2025

• LLM-Based AI Agent That Automates The Transistor Sizing Process (Univ. of Edinburgh)

  Published on October 10, 2025

• Framework for Optimizing Reliability and Thermal Management of 3DICs (National Taiwan Univ., Lamar Univ.)

  Published on October 10, 2025
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