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Technical Paper Home

Power & Performance

  • Analog On-Chip Learning Circuits In Mixed-Signal Neuromorphic SNNs

    Published on July 20, 2023
  • System Level Power Integrity Verification For Multi-Core Microprocessors With FIVR

    Published on July 15, 2023
  • Redox-Based Ionic Devices For High-Performance Neuromorphic Computing

    Published on July 14, 2023
  • Organic Bioelectronic Device To Record And Transmit Brain Signals Plus Provide Power

    Published on July 14, 2023
  • DW-MTJ Devices For Noise-Resilient Networks For Neuromorphic Computing On The Edge

    Published on July 8, 2023
  • DRAM Translation Layer, Mechanism for Flexible Address Mapping and Data Migration Within CXL-Based Memory Devices

    Published on July 6, 2023
  • Heterogeneous Integration As A Path Towards Sustainable Computing, Using Chiplets

    Published on July 6, 2023
  • A Design Architecture For Optically Broadband Programmable PICs Utilizing Micromechanical Resonances 

    Published on July 6, 2023
  • A Photonic Circuit Architecture Allowing Faster, More Efficient Transfer of Large Amounts of Data

    Published on July 6, 2023
  • Resistive Switching Memory Based on Thin-Film Design of Amorphous Hafnium Oxide (Cambridge & Others)

    Published on June 28, 2023
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