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Power & Performance

• Leveraging In-Package Wireless Technology To Improve The Thermal Behavior Of 2.5D Chiplet-Based SoP

  Published on September 19, 2023

• Hardware Platform For Evolving Robots

  Published on September 15, 2023

• A Hierarchical Instruction Cache Tailored To Ultra-Low-Power Tightly-Coupled Processor Clusters

  Published on September 15, 2023

• SG2042 64-Core RISC-V CPU Versus Existing RISC-V HW And High Performance x86 CPUs

  Published on September 13, 2023

• DRAM Simulator For Evaluation of Memory System Design Changes (ETH Zurich)

  Published on September 13, 2023

• Neuromorphic Artificial Synaptic Device Combining Memristor Arrays With Copper Iodide

  Published on September 13, 2023

• A Perovskite-Derivative Nickelate Offering More Durable, Sustainable Multi-Level Non-Volatile Phase Change Memory

  Published on September 13, 2023

• The Utility Of Shallow Dynamic Circuits For Long-Range Entanglement On Large-Scale Quantum Devices

  Published on September 6, 2023

• An Energy-Efficient 10T SRAM In-Memory Computing Macro Architecture For AI Edge Processor

  Published on August 28, 2023

• An Open-Source Hardware Design And Specification Language To Improve Productivity And Verification 

  Published on August 28, 2023
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