Technical Paper Home

AI/ML/DL

• Co-Packaged Optics To Train/Run GenAI Models in Data Centers (IBM)

  Published on December 27, 2024

• Wafer Bin Map Defect Classification Using Semi-Supervised Learning

  Published on December 27, 2024

• CXL’s Potential to Elevate The Capabilities of HPC and AI Applications (Micron, Intel)

  Published on December 20, 2024

• Chiplet-Based NPUs to Accelerate Vehicular AI Perception Workloads

  Published on December 2, 2024

• STCO for Dense Edge Architectures using 3D Integration and NVM (imec,, et al.)

  Published on November 27, 2024

• Critical Design Considerations For High-Bandwidth Chiplet Interconnects (TSMC)

  Published on November 26, 2024

• Pooling CPU Memory for LLM Inference With Lower Latency and Higher Throughput (UC Berkeley)

  Published on November 26, 2024

• Backpropagation Algorithm On Neuromorphic Spiking HW (U. Of Zurich, ETH Zurich, LANL)

  Published on November 25, 2024

• Dedicated 3D Accelerator Specifically Designed For Emerging Spiking Transformers

  Published on November 13, 2024

• Workload-Specific Data Movements Across AI Workloads in Multi-Chiplet AI Accelerators

  Published on November 4, 2024
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