Technical Paper Home

Power & Performance

• Router-in-a-Package Design Combining HBM4, Chiplets and In-Package Optics (Technion, Berkeley, UCSD)

  Published on February 18, 2026

• Less Power and Higher Performance With A Nanolaser With Extreme Dielectric Confinement (DTU)

  Published on February 16, 2026

• Automated MLIR-based HLS framework That Generates FPGA HW Designs From A Variety of CNN Layers (TU Dresden)

  Published on February 15, 2026

• IMC: Free-Space Optical Neural Network With High Clockrate (Berkeley, USC, TU Berlin)

  Published on February 12, 2026

• Neuromorphic HW That Detects Motion Changes 4X Faster (Beihang, BIT, KAUST, Cambridge et al.)

  Published on February 11, 2026

• Thermal Characterization For Power Semiconductor Packages (KATECH)

  Published on February 6, 2026

• Comprehensive System-Level Performance Model For p-SRAM-Based IMC (USC, UW-Madison)

  Published on February 6, 2026

• ML for Energy-Performance-Aware Scheduling On Heterogeneous Multicore Architectures (Cambridge)

  Published on February 2, 2026

• Ultra-low-bit LLM Inference Allows AI-PC CPUs And Discrete Client GPUs To Approach High-end GPU-Level (Intel)

  Published on January 28, 2026

• MFMIS FeTFETs For Energy-Efficient, Scalable CIM Hardware Accelerators (Seoul National University)

  Published on January 26, 2026
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