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Technical Paper Home

Transistors

  • Scalable Fabrication of Graphene FETs on Non-Planar Surfaces (Imperial College London)

    Published on September 12, 2024
  • Large-Scale VFETs With Ultra-Short Channel Length And High Performance

    Published on September 4, 2024
  • Buried Si/SiGe Interfaces Investigated Using Soft X-Ray Reflectometry and STEM-EDX

    Published on August 27, 2024
  • 5 Novel Layout Design Methodologies For The 3nm Nanosheet FET Library (Samsung, KNU)

    Published on August 13, 2024
  • Monolithic 3D TFT Integration at Room Temperature, Used to Stack 10 Vertical Layers

    Published on July 12, 2024
  • Power Electronic Packaging for Discrete Dies

    Published on June 20, 2024
  • Device Characteristics of GAA-Structured CMOS and CTFET Under Varying Temperatures

    Published on June 10, 2024
  • GaN Devices: Properties and Performance At Extremely High Temperatures

    Published on May 28, 2024
  • Ferroelectric Memory-Based IMC for ML Workloads

    Published on May 21, 2024
  • Demonstrating The Feasibility Of The Foundry Model For Flexible Thin-Film Electronics 

    Published on May 15, 2024
    • Page 6 of 21
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