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Technical Paper Home

Memory

  • Mixed Signal In-Memory Computing With Massively Parallel Gradient Calculations of High-Degree Polynomials

    Published on September 19, 2024
  • Better Security and Power Efficiency of Ascon HW Implementation with STT-MRAM (CEA, et al.)

    Published on September 18, 2024
  • Energy-Efficient DRAM↔PIM Transfers for PIM Systems (KAIST)

    Published on September 18, 2024
  • Memory Fundamentals For Engineers

    Published on September 17, 2024
  • Quantum Computing: Google’s Surface Code Technique to Reduce Errors

    Published on September 11, 2024
  • Analog In-Memory Computing: Fast Deep NN Training (IBM Research)

    Published on September 10, 2024
  • Scalable Chiplet System for LLM Training, Finetuning and Reduced DRAM Accesses (Tsinghua University)

    Published on September 4, 2024
  • DL Compiler for Efficiently Utilizing Inter-Core Connected AI Chips (UIUC, Microsoft)

    Published on August 28, 2024
  • A HW-Based Correct Execution Environment Supporting Virtual Memory (Korea U., KAIST)

    Published on August 27, 2024
  • Data Memory-Dependent Prefetchers Pose SW Security Threat By Breaking Cryptographic Implementations

    Published on August 19, 2024
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