Netlist-to-GDSII physical design solutions, Apogee (top-level) & Aprisa (block level), includes floorplanning, placement, clock-tree synthesis and optimization, global and detailed routing, and a fast timing engine to solve the complex timing issues associated with on chip variation (OCV) and multi-corner, multi-mode (MCMM) analysis.
See also: Executive Viewpoint: Atoptech’s Jue-Hsien Chern
