Neolinear’s software tools were developed to help end users design chips more efficiently and economically.
Analog circuitry is challenging to design (which causes design cycles to stretch) and analog content is extremely sensitive to process variations. These challenges can adversely impact chip yields. Neolinear’s technology speeds SoC and A/MS design and improves quality by providing design exploration, design centering, and circuit and layout optimization early in the design cycle. This enables designers to optimize circuit specifications while taking into account manufacturing variations. The net result is higher-performance designs with improved yield in less time. Moreover, circuits created with Neolinear’s unique design technologies become analog IP that designers can reuse and retarget to new processes, speeding time-to-market.
NeoCell layout tool, NeoCircuit circuit sizing tool and a multimillion dollar U.S. contract with the Defense Advanced Research Projects Agency (Darpa) to build next- generation RF design tools.
Cadence was an initial investor in Neolinear, which in its five years of existence raised $17 million in venture funding.
Rob A. Rutenbar and Rick Carley, two of Neolinear’s co-founders and both professors of electrical and computer engineering at Carnegie Mellon founded Neolinear in 1996 to commercialize the ideas that resulted from 10 years of joint research at Carnegie Mellon.
