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Security

• HW Security: Fingerprints Of Digital Circuits Using Electromagnetic Side-Channel Sensing & Simulations (Georgia Tech)

  Published on December 1, 2022

• Capability Hardware Enhanced RISC Instructions (CHERI) For Verification, With Better Memory Safety (Oxford)

  Published on November 30, 2022

• EV Charging Cybersecurity Challenges (Sandia National Labs)

  Published on November 23, 2022

• Rowhammer: Recent Developments & Future Directions (ETH Zurich)

  Published on November 20, 2022

• Semiconductor Manufacturing: Tradeoffs Between Performance, Energy Consumption & Cybersecurity Controls

  Published on November 8, 2022

• Side-Channel Secure Translation Lookaside Buffer Architecture

  Published on October 28, 2022

• Hardware Trojan Inserted Inside A RISC-V Based Automotive Telematics Control Unit

  Published on October 21, 2022

• Locking-Based Design-For-Security Methodology To Prevent Piracy of RF transceiver ICs

  Published on October 18, 2022

• Automating The Detection of Hardware Common Weakness Enumerations In Early Design

  Published on October 12, 2022

• Decreasing Refresh Latency of Off-the-Shelf DRAM Chips

  Published on September 28, 2022
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