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Power & Performance

• Manycore-FPGA Architecture Employing Novel Duet Adapters To Integrate eFPGAs in a Scalable, Non-Intrusive, Cache-Coherent Manner (Princeton)

  Published on January 16, 2023

• Quantum Computing Architecture Enabling Communication Between Superconducting Quantum Processors (MIT)

  Published on January 11, 2023

• Arbitrary Precision DNN Accelerator Controlled by a RISC-V CPU (Ecole Polytechnique Montreal, IBM, Mila, CMC)

  Published on January 10, 2023

• FPGA-Based Prototyping Framework For Processing In DRAM (ETH Zurich & TOBB Univ.)

  Published on January 10, 2023

• High Dynamic Range Josephson Parametric Amplifiers (Google Quantum AI & Others)

  Published on January 6, 2023

• Multi-Wavelength, Multimode Communication Scheme For On-Chip and Chip-to-Chip Interconnects

  Published on January 2, 2023

• MTJ-based Circuits Provide Low-Cost, Energy Efficient Solution For Future Hardware Implementation in SC Algorithms

  Published on December 30, 2022

• MOVPE Grown (100) Beta-Gallium Oxide Layers for Power Electronics Application

  Published on December 20, 2022

• Hardware Accelerator For Fully Homomorphic Encryption

  Published on December 20, 2022

• RISC-V decoupled Vector Processing Unit (VPU) For HPC

  Published on December 20, 2022
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