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New SE eBook examines the next phase of semiconductor design, testing, and manufacturing.
AI export rule to be scrapped; SEMI, EU request; Cadence, Nvidia supercomputer; AI co-processor; Imagination’s new GPU; semi sales up; imec, TNO photonics lab; NSF key to national security; flexible packaging control system; SiConic test engineering; USB 4 support; SiC JFETS; magnetic behavior in hematite.
Intel, TSMC, and Samsung are developing a broad set of technologies and relationships that will be required for the next generation of AI chips.
TSMC’s technology roadmap; Intel cuts; reciprocal hacking; McKinsey on IC challenges, ML algorithm table; subsystem chiplets; cross-domain PLM; magnetic switches; sarin sensors.
AI cannot optimize unless it can measure progress towards goals, but defining those goals is not easy, especially when looking at the entire development flow.
