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Technical Papers

• 2D materials–based homogeneous transistor-memory architecture for neuromorphic hardware

  Published on August 21, 2021

• FORMS: Fine-grained Polarized ReRAM-based In-situ Computation for Mixed-signal DNN Accelerator

  Published on August 19, 2021

• Vector Runahead

  Published on August 19, 2021

• Hardware Architecture and Software Stack for PIM Based on Commercial DRAM Technology

  Published on August 19, 2021

• Marangoni Effect-Based Under-Layer For A Dual Damascene Via-First Approach

  Published on August 19, 2021

• Wafer-Level Fan-Out For High-Performance, Low-Cost Packaging Of Monolithic RF MEMS/CMOS

  Published on August 18, 2021

• Leaky Buddies: Cross-Component Covert Channels on Integrated CPU-GPU Systems

  Published on August 11, 2021

• IChannels: Exploiting Current Management Mechanisms to Create Covert Channels in Modern Processors

  Published on August 11, 2021

• A RISC-V in-network accelerator for flexible high-performance low-power packet processing

  Published on August 11, 2021

• SpZip: Architectural Support for Effective Data Compression In Irregular Applications

  Published on August 11, 2021
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