Technical Paper Home

Power & Performance

• Survey of Energy Efficient PIM Processors

  Published on August 1, 2024

• MTJ-Based CRAM Array

  Published on August 1, 2024

• Co-optimizing HW Architecture, Memory Footprint, Device Placement And Per-Chip Operator Scheduling (Georgia Tech, Microsoft)

  Published on July 28, 2024

• Using Diffusion Models to Generate Chip Placements (UC Berkeley)

  Published on July 27, 2024

• Battery Electronification: Intracell Actuation And Thermal Management (Penn State, EC Power)

  Published on July 27, 2024

• Survey of CXL Implementations and Standards (Intel, Microsoft)

  Published on July 22, 2024

• Improving Performance and Power Efficiency By Safely Eliminating Load Instruction Execution (ETH Zürich, Intel)

  Published on July 22, 2024

• SiC Power Electronics Packaging: Floating Die Structure and Liquid Metal Fluidic Connection (Cambridge U. )

  Published on July 17, 2024

• In Situ Backpropagation Strategy That Progressively Updates Neural Network Layers Directly in HW (TU Eindhoven)

  Published on July 16, 2024

• On-Chip Communication For Programmable Accelerators In Heterogeneous SoCs (Columbia, IBM)

  Published on July 10, 2024
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