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Power & Performance

• Wire-Friendly Domain-Specific Processor for Angstrom-Era Nodes with High Core Density (Politecnico di Torino, imec et al.)

  Published on August 19, 2025

• Thermally-Aware, Multi-Objective Scheduling Framework for DL Workloads on Heterogeneous Multi-Chiplet PIM Architectures (UW–Madison, Washington State)

  Published on August 19, 2025

• Scheduling Architecture Integrated With M3D BEOL Memories For LLM Inference (Georgia Tech, Samsung)

  Published on August 19, 2025

• Energy-Efficient Signal Detectors For Massive MIMO Using SRAM-Based IMCs (Univ. of Illinois at Urbana–Champaign)

  Published on August 15, 2025

• Power Gating Enabling in NPUs (Univ. of Illinois Urbana-Champaign)

  Published on August 15, 2025

• Noise Margin Enhancing ULVR SRAM Cell (Tokyo Institute of Technology)

  Published on August 6, 2025

• 3DICs: Atomic-Scale Behavior of Electromigration in Cu−Cu Joints (NYCU, ITRI)

  Published on August 5, 2025

• SpiNNaker2 Neuromorphic Platform: HW-Aware Fine-Tuning of Spiking Q-Networks (TU Dresden Et Al.)

  Published on August 5, 2025

• Optical Next-Gen Reservoir Computing Framework (Sorbonne, CNRS, Tsinghua U. et al)

  Published on August 5, 2025

• Double Intra-Cavity VCSELs: Properties And Design Challenges At Cryogenic Temperatures (Tampere Univ.)

  Published on August 5, 2025
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