Technical Paper Home

Design & Verification

• Self-Driving Cars: Formalization and Verification Of The Responsibility-Sensitive Safety (RSS) Model

  Published on June 28, 2023

• Leveraging Large Language Models (LLMs) To Perform SW-HW Co-Design

  Published on June 28, 2023

• The Implementation Of Cooperative Collision Avoidance For Connected Vehicles (Ohio State University)

  Published on June 24, 2023

• Fault Awareness And Reliability Improvements In a Fault-Tolerant RISC-V SoC (HARV-SoC)

  Published on June 24, 2023

• Search Based Method For Identifying Aging Model Parameters

  Published on June 24, 2023

• An Energy Efficient, Linux-Capable RISC-V Host Platform Designed For The Seamless Plug-In And Control Of Domain-Specific Accelerators

  Published on June 14, 2023

• Chiplets: Bridging The Gap Between The System Requirements And Design Aggregation, Planning, And Optimization

  Published on June 14, 2023

• Tools for Co-Designing HPC Systems Using RISC-V As A Demonstrator

  Published on June 14, 2023

• An Evaluation of Quantum Algorithms On Classical Hardware Using The CuQuantum Framework

  Published on June 7, 2023

• Nanosheet GAAFETs: Compact Modeling (Politecnico di Torino)

  Published on June 7, 2023
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