Technical Paper Home

Design & Verification

• Reverse Engineering NVIDIA GPU Cores (Universitat Politècnica de Catalunya)

  Published on March 30, 2025

• Scalable And Energy Efficient Solution for Hardware-Based ANNs (KAUST, NUS)

  Published on March 30, 2025

• GPU Analysis Identifying Performance Bottlenecks That Cause Throughput Plateaus In Large-Batch Inference

  Published on March 30, 2025

• Evaluation Tool For The Cost Impacts Of Chiplet-Specific Design Choices

  Published on March 25, 2025

• Defect Analysis and Testing Framework For FOWLP Interconnects

  Published on March 24, 2025

• Design Optimization Techniques To Improve NC-CFET Performance

  Published on March 14, 2025

• Multi-Party Computation for Securing Chiplets

  Published on March 12, 2025

• A Novel Tier Partitioning Method in 3DIC Placement Optimizing PPA

  Published on March 11, 2025

• Thermal-Aware DSE Framework for 3DICs, With Advanced Cooling Models

  Published on March 11, 2025

• Thermally Aware Chiplet Placement Algorithm Based on Automatic Differentiation (MIT, IBM)

  Published on March 7, 2025
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