Technical Paper Home

Design & Verification

• Study Of Multi-Die And Multi-Technology Floorplanning (Texas A&M, Duke)

  Published on April 5, 2025

• Photonic-SRAM Bitcell for High-Speed On-Chip Photonic Memory and Compute Systems (UW, USC, GF)

  Published on April 4, 2025

• Adaptive RISC-V Cache Architecture for Near-Memory Extensions (Politecnico di Torino, EPFL)

  Published on April 4, 2025

• LLM-based Agentic Framework Automating HW Security Threat Modeling And Test Plan Generation (U. of Florida)

  Published on April 1, 2025

• Reverse Engineering NVIDIA GPU Cores (Universitat Politècnica de Catalunya)

  Published on March 30, 2025

• Scalable And Energy Efficient Solution for Hardware-Based ANNs (KAUST, NUS)

  Published on March 30, 2025

• GPU Analysis Identifying Performance Bottlenecks That Cause Throughput Plateaus In Large-Batch Inference

  Published on March 30, 2025

• Evaluation Tool For The Cost Impacts Of Chiplet-Specific Design Choices

  Published on March 25, 2025

• Defect Analysis and Testing Framework For FOWLP Interconnects

  Published on March 24, 2025

• Design Optimization Techniques To Improve NC-CFET Performance

  Published on March 14, 2025
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