Codasip provides RISC-V processor IP and automates design and customization of RISC-V processors and their toolchains. The company also supports custom processor IP design and automated verification for ASIC designers. Codasip is a founding member of the RISC-V Foundation and a long-term supplier of LLVM and GNU-based processor solutions. Codasip is committed to open standards for embedded processors.
History:
Founded in 2006, Codasip introduced its first RISC-V processor in November 2015. Research and development located in Brno, Czech Republic, with offices in the US and representatives in Asia and Israel. Initially backed by Credo Ventures of Prague, Czech Republic, Codasip had $10 million in Series A funding in 2018 from Ventech Capital, Shenzhen Capital Group Co., Ltd. of Shenzhen, China, Paua Ventures, and Western Digital. In 2020 Codasip has European Union Horizon 2020 funding and funding from
Products:
Codasip makes Codasip Studio and Codasip CodeSpace. Codasip Studio is a comprehensive ASIP development environment that can generate a software development kit (SDK) optimized for a specific processor. The Studio enables the automatic generation of RTL, software development tools, simulation models, and UVM descriptions from a CodAL description of the core. SweRV Support Package (SSP) is a toolkit Codasip offers for making SweRV Core EH1s, the RISC-V core from Western Digital.
Karel Masarik is the CEO and co-founder of Codasip.
