Understanding Fault Injection Attacks At The Pre-Silicon Level


A new technical paper titled "CRAFT: Characterizing and Root-Causing Fault Injection Threats at Pre-Silicon" was published by researchers at North Carolina State University. Abstract "Fault injection attacks represent a class of threats that can compromise embedded systems across multiple layers of abstraction, such as system software, instruction set architecture (ISA), microarchitecture, ... » read more

Scenario Coverage In Formal Verification


A rapid increase in complexity with heterogeneous assemblies and advanced-node chips is raising all sorts of questions on the formal verification side about the completeness of coverage. Engineers may assume proofs are complete, but in many cases they're black boxes that provide little or no insights into what's actually being proven. This is where scenario coverage comes into play. Ashish Darb... » read more

RISC-V High Performance Multicore and GPU SoC Platform For Safety Critical System


A new technical paper titled "A RISC-V Multicore and GPU SoC Platform with a Qualifiable Software Stack for Safety Critical Systems" published by researchers at Universitat Politecnica de Catalunya and Barcelona Supercomputing Center. Abstract "In the context of the Horizon Europe project, METASAT, a hardware platform was developed as a prototype of future space systems. The platform is bas... » read more

Maximizing Energy Efficiency in Subthreshold RISC-V Cores (NTNU)


A new technical paper titled "Optimizing Energy Efficiency in Subthreshold RISC-V Cores" was published by researchers at Norwegian University of Science and Technology (NTNU). Abstract "Our goal in this paper is to understand how to maximize energy efficiency when designing standard-ISA processor cores for subthreshold operation. We hence develop a custom subthreshold library and use it to ... » read more

Chip Industry Week In Review


The chip industry is well on its way to hit $1 trillion in revenue by the end of its decade. Several analyst firms released 2024 annual results and 2025 predictions: Worldwide semiconductor revenue reached $626 billion in 2024, an 18% increase versus 2023, according to preliminary Gartner report. Memory revenue grew about 70%  2024 versus 2023. The firm forecasts that HBM will make up 19%... » read more

Designing Heterogeneous AI Acceleration SoCs


A new technical paper titled "Open-Source Heterogeneous SoCs for AI: The PULP Platform Experience" was published by researchers at University of Bologna. Abstract "Since 2013, the PULP (Parallel Ultra-Low Power) Platform project has been one of the most active and successful initiatives in designing research IPs and releasing them as open-source. Its portfolio now ranges from processor co... » read more

Top Tech Videos Of 2024


In 2024, hot topics included challenges involving chiplets and heterogeneous integration, AI, data management, MCUs, power semis, software-defined vehicles, sensors, adaptive test, yield tracking, safety monitoring, security, and much more. Top 5 most watched videos in 2024: Overlay Optimization In Advanced IC Substrates How To Stop Row Hammer Attacks What’s Changing In DRAM ... » read more

RISC-V Profiles Help Conformance


Experts At The Table: What's needed to be able to trust that a RISC-V implementation will work as expected across multiple designs using standard OSes. Semiconductor Engineering discussed the issue with John Min, vice president of customer service at Arteris; Zdeněk Přikryl, CTO of Codasip; Neil Hand, director of marketing at Siemens EDA (at the time of this discussion); Frank Schirrmeist... » read more

Using Formal For RISC-V Security


Finding and closing up security holes is becoming more important as chips are used in safety- and mission-critical applications, but it's increasingly important for chips designed for much less costly devices, where the selling price typically doesn't warrant a significant investment in security. The problem is these devices are connected to some of the same networks, and any access points for ... » read more

RISC-V’s Software Portability Challenge


Experts At The Table: RISC-V provides a platform for customization, but verifying those changes remains challenging. Semiconductor Engineering discussed the issue with John Min, vice president of customer service at Arteris; Zdeněk Přikryl, CTO of Codasip; Neil Hand, director of marketing at Siemens EDA (at the time of this discussion); Frank Schirrmeister, executive director for strategi... » read more

← Older posts