Chip Industry Week in Review

By The SE Staff - 02 May, 2025 - Comments: 0

Check out the Inside Chips podcast for our behind-the-scenes analysis of changes at Intel Foundry. Intel rolled out its updated process technology roadmap this week, along with early process design kit (PDK) for its 14A gate-all-around process technology. That node will utilize high-NA EUV, and include direct contact power delivery, the second generation of its backside power delivery techno... » read more

Chip Industry Week In Review

By The SE Staff - 18 Apr, 2025 - Comments: 0

[Podcast version is here.] TSMC said it will produce 30% of its leading-edge chips in Arizona when all six of its fabs are operational, a total investment of $165 billion, Axios reported. In its latest SEC filing, the foundry said it continues to add capacity in Taiwan, Arizona, Japan, and Germany. The Trump administration launched a Section 232 investigation into semiconductors and relat... » read more

Adaptive RISC-V Cache Architecture for Near-Memory Extensions (Politecnico di Torino, EPFL)

By Technical Paper Link - 04 Apr, 2025 - Comments: 0

A new technical paper titled "ARCANE: Adaptive RISC-V Cache Architecture for Near-memory Extensions" was published by researchers at Politecnico di Torino and EPFL. Abstract "Modern data-driven applications expose limitations of von Neumann architectures - extensive data movement, low throughput, and poor energy efficiency. Accelerators improve performance but lack flexibility and require... » read more

Accelerate And Derisk RISC-V- Based SoC Designs

By Arteris - 26 Mar, 2025 - Comments: 0

How to accelerate and derisk RISC-V-based SoC designs using silicon-proven network-on-chip IP and SoC integration automation software. This technology seamlessly connects any IP from multiple vendors and shortens design cycles and time to revenue. Maximize overall efficiency for the best product design, leveraging the best NoC IP and expert support. Read more here. » read more

Understanding Fault Injection Attacks At The Pre-Silicon Level

By Technical Paper Link - 07 Mar, 2025 - Comments: 0

A new technical paper titled "CRAFT: Characterizing and Root-Causing Fault Injection Threats at Pre-Silicon" was published by researchers at North Carolina State University. Abstract "Fault injection attacks represent a class of threats that can compromise embedded systems across multiple layers of abstraction, such as system software, instruction set architecture (ISA), microarchitecture, ... » read more

Scenario Coverage In Formal Verification

By Ed Sperling - 05 Mar, 2025 - Comments: 0

A rapid increase in complexity with heterogeneous assemblies and advanced-node chips is raising all sorts of questions on the formal verification side about the completeness of coverage. Engineers may assume proofs are complete, but in many cases they're black boxes that provide little or no insights into what's actually being proven. This is where scenario coverage comes into play. Ashish Darb... » read more

RISC-V High Performance Multicore and GPU SoC Platform For Safety Critical System

By Technical Paper Link - 03 Mar, 2025 - Comments: 0

A new technical paper titled "A RISC-V Multicore and GPU SoC Platform with a Qualifiable Software Stack for Safety Critical Systems" published by researchers at Universitat Politecnica de Catalunya and Barcelona Supercomputing Center. Abstract "In the context of the Horizon Europe project, METASAT, a hardware platform was developed as a prototype of future space systems. The platform is bas... » read more

Maximizing Energy Efficiency in Subthreshold RISC-V Cores (NTNU)

By Technical Paper Link - 12 Feb, 2025 - Comments: 0

A new technical paper titled "Optimizing Energy Efficiency in Subthreshold RISC-V Cores" was published by researchers at Norwegian University of Science and Technology (NTNU). Abstract "Our goal in this paper is to understand how to maximize energy efficiency when designing standard-ISA processor cores for subthreshold operation. We hence develop a custom subthreshold library and use it to ... » read more

Chip Industry Week In Review

By The SE Staff - 07 Feb, 2025 - Comments: 0

The chip industry is well on its way to hit $1 trillion in revenue by the end of its decade. Several analyst firms released 2024 annual results and 2025 predictions: Worldwide semiconductor revenue reached $626 billion in 2024, an 18% increase versus 2023, according to preliminary Gartner report. Memory revenue grew about 70% 2024 versus 2023. The firm forecasts that HBM will make up 19%... » read more

Designing Heterogeneous AI Acceleration SoCs

By Technical Paper Link - 06 Jan, 2025 - Comments: 0

A new technical paper titled "Open-Source Heterogeneous SoCs for AI: The PULP Platform Experience" was published by researchers at University of Bologna. Abstract "Since 2013, the PULP (Parallel Ultra-Low Power) Platform project has been one of the most active and successful initiatives in designing research IPs and releasing them as open-source. Its portfolio now ranges from processor co... » read more

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tag: RISC-V

Chip Industry Week in Review

Chip Industry Week In Review

Adaptive RISC-V Cache Architecture for Near-Memory Extensions (Politecnico di Torino, EPFL)

Accelerate And Derisk RISC-V- Based SoC Designs

Understanding Fault Injection Attacks At The Pre-Silicon Level

Scenario Coverage In Formal Verification

RISC-V High Performance Multicore and GPU SoC Platform For Safety Critical System

Maximizing Energy Efficiency in Subthreshold RISC-V Cores (NTNU)

Chip Industry Week In Review

Designing Heterogeneous AI Acceleration SoCs

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