Born in St. Louis, Missouri in 1952.
While at Stanford, Widdoes began working on the SCALD system with Tom McWilliams. He finished his PhD on the SCALD Physical Design Subsystem in 1980
In 1981, Widdoes founded Valid Logic Systems to commercialize SCALD. Valid executed an IPO in 1983.
In 1987, he founded Logic Modeling Systems, which provided simulation models of VLSI components. Logic Modeling was acquired by Synopsys in 1994.
In 1996, he co-founded 0-In Design Automation, which pioneered assertion-based verification for the design of integrated circuits. 0-In was acquired by Mentor Graphics Corporation in 2004.
After the acquisition, Widdoes served as Mentor Graphics’ Chief Engineering Scientist until he retired from EDA in 2006.
Widdoes holds a B.S. in engineering and applied science from the California Institute of Technology and a Ph.D. in computer science from Stanford University. He holds eighteen U.S. patents in EDA and is an IEEE W. Wallace McDowell Award recipient.
