tag: Mentor

Chip Industry Week In Review
By The SE Staff - 28 Feb, 2025 - Comments: 0

Intel said its new fab in Licking County, Ohio will be delayed due to financial struggles and a need to align chip production with market demand, reported the Columbus Dispatch. Construction is now estimated to be completed in 2030, with operations to start in 2030 or 2031. The company said it already has invested $3.7 billion locally. Apple plans to invest more than $500 billion in the U.S... » read more

Simplifying HW/SW Co-Verification With PSS Led UVM And C Tests
By Todd Burkholder - 27 Feb, 2025 - Comments: 0

By Todd Burkholder, Wael Abdelaziz Mahmoud, Tom Fitzpatrick, Vishal Baskar, and Mohamed Nafea The complexity of system on chips (SoCs) continues to grow rapidly with the integration of more functionality onto a single chip. As a result, traditional verification methodologies struggle to keep pace with the growing complexities, leading to longer development cycles and increased risk of design... » read more

Improving Verification Methodologies
By Brian Bailey - 27 Feb, 2025 - Comments: 0

Methodology improvements and automation are becoming pivotal for keeping pace with the growing complexity and breadth of the tasks assigned to verification teams, helping to compensate for lagging speed improvements in the tools. The problem with the tools is that many of them still run on single processor cores. Functional simulation, for example, cannot make use of an unlimited number of c... » read more

Multi-Die Design Complicates Data Management
By Adam Kovac - 27 Feb, 2025 - Comments: 0

The continued unbundling of SoCs into multi-die packages is increasing the complexity of those designs and the amount of design data that needs to be managed, stored, sorted, and analyzed. Simulations and test runs are generating increasing amounts of information. That raises questions about which data needs to be saved and for how long. During the design process, engineers now must wrestle ... » read more

A Novel Approach For Hardware-Software Co-Verification
By Siemens EDA - 26 Feb, 2025 - Comments: 0

The complexity of system on chips (SoCs) continues to grow rapidly. Accordingly, new standards and methodologies are introduced to overcome these verification challenges. The Portable Test and Stimulus Standard (PSS) from Accellera is one of the standard examples used to pursue such challenges. In this paper we will show a methodology to use PSS to orchestrate the process of HW/SW co-verificati... » read more

What Scares Chip Engineers About Generative AI
By Adam Kovac - 26 Feb, 2025 - Comments: 0

Experts At The Table: LLMs and other generative AI programs are a long way away from being able to design entire chips on their own from scratch, but the emergence of the tech has still raised some genuine concerns. Semiconductor Engineering sat down with a panel of experts, which included Rod Metcalfe, product management group director at Cadence; Syrus Ziai, vice-president of engineering at E... » read more

Chip Industry Week In Review
By The SE Staff - 21 Feb, 2025 - Comments: 0

The EU Commission approved €920 million in German State aid to support Infineon in setting up its Smart Power Fab in Dresden. Total funding for the Dresden site amounts to about €1 billion. PDF Solutions will acquire secureWISE for $130 million to expand the reach of its semiconductor manufacturing data platform, providing secure, remote access monitoring and control. Tariffs, trade, and ... » read more

Blog Review: Feb. 19
By Jesse Allen - 19 Feb, 2025 - Comments: 0

Cadence's Ravi Vora explains the AMBA Local Translation Interface protocol, which defines the point-to-point protocol between an I/O device and the Translation Buffer Unit of an Arm System Memory Management Unit. Siemens' Stephen V. Chavez provides a checklist for ensuring the quality and functionality of a PCB at every stage, from design through fabrication, assembly, and testing, with a fo... » read more

Controlling Leakage Power
By Matthew Hogan - 17 Feb, 2025 - Comments: 0

IC designers face a significant challenge in managing leakage power - a phenomenon that can profoundly impact your device's power, performance, area (PPA), and overall reliability. Leakage can occur in various ways, from parasitic leakage to analog gate leakage or digital gate leakage, and you must address these issues with great care, as even subtle circuit changes can lead to reliability prob... » read more

ADAS Adds Complexity To Automotive Sensor Fusion
By Ann Mutschler - 17 Feb, 2025 - Comments: 0

Sensor fusion is becoming increasingly popular and more complex in automotive designs, integrating multiple types of sensors into a single chip or package and intelligently routing data to wherever it is needed. The primary goal is to bring together information from cameras, radar, lidar, and other sensors in order to provide a detailed view of what's happening inside and outside of a vehicl... » read more

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