Chip Industry Week in Review

By The SE Staff - 16 May, 2025 - Comments: 0

Newly proposed U.S. legislation called the Chip Security Act would use location verification tracking as a tool to help combat chip smuggling. This follows a report by the Economist that showed Taiwan exports of advanced chips to Malaysia in the first quarter has nearly reached 2024 totals, heightening concerns that China has a “convenient back door.” In addition to formally announcing p... » read more

Best Practices For Power-Aware Verification: Because Designing For Low Power Is Only Half The Battle

By Chandu Challapalli - 15 May, 2025 - Comments: 0

As modern chips push the limits of power efficiency, power management has become a top priority. With today’s increasingly complex devices, verifying power intent isn’t just a technical requirement. It’s a necessity for building reliable silicon. One of the most important lessons learned in recent years is that RTL and power intent must evolve together. Treating power intent as a post... » read more

Die-to-die Interconnect Standards In Flux

By Bryon Moyer - 15 May, 2025 - Comments: 0

UCIe, a standard for die-to-die interconnect in advanced packages, has drawn concern about being too heavyweight with its 2.0 release. But the fact that many of the new features are optional seems to have been lost in much of the public discussion. In fact, new capabilities that support a possible future chiplet marketplace are not required for designs that don’t target that marketplace. ... » read more

Development Flows For Chiplets

By Brian Bailey - 15 May, 2025 - Comments: 0

Chiplets offer a huge leap in semiconductor functionality and productivity, just like soft IP did 40 years ago, but a lot has to come together before that becomes reality. It takes an ecosystem, which is currently very rudimentary. Today, many companies have hit the reticle limit and are forced to move to multi-die solutions, but that does not create a plug-and-play chiplet market. These ear... » read more

Blog Review: May 14

By Jesse Allen - 14 May, 2025 - Comments: 0

Siemens’ Stephen V. Chavez finds that proper PCB high voltage spacing between conductive elements is key to reliability and understanding the principles of clearance (through-air spacing) and creepage (along-surface spacing) is critical. Cadence’s Frank Ferro checks out how the new HBM4 standard boosts bandwidth and addresses key issues in the data center, including the growing size of L... » read more

Chip Industry Week in Review

By The SE Staff - 09 May, 2025 - Comments: 0

Check out the Inside Chips podcast for our behind-the-scenes analysis. The U.S. government is rescinding a Biden-era AI export rule that would have imposed complex restrictions on how U.S. chip and AI technology is sold abroad, a move welcomed by companies like Nvidia, reports Bloomberg. While new, simpler guidelines are expected in the coming months, the decision introduces short-term uncer... » read more

Shifting Left With DFT To Optimize Productivity, Testability, And Time-To-Market

By Siemens EDA - 08 May, 2025 - Comments: 0

This paper discusses one of the Siemens EDA shift-left strategies in the RTL-to-signoff flow: shift-left design-for-test (DFT). Tessent RTL Pro software automates the analysis and insertion of Tessent VersaPoint test point technology, LBIST-OST test points, dedicated scan wrapper cells and x-bounding logic as behavioral code at the RTL level. Tessent RTL Pro builds on Tessent’s market-leading... » read more

Identifying Sources Of Silent Data Corruption

By Laura Peters - 08 May, 2025 - Comments: 0

Silent data errors are raising concerns in large data centers, where they can propagate through systems and wreak havoc on long-duration programs like AI training runs. SDEs, also called silent data corruption, are technically rare. But with many thousands of servers, which contain millions of processors running at high utilization rates, these damaging events become common in large fleets. ... » read more

IoT Security By Design

By Lee Harrison - 08 May, 2025 - Comments: 0

After years of anticipation and steady uptake, the Internet of Things (IoT) seems poised to cross over into mainstream business use. The percentage of businesses utilizing IoT technologies has risen from 13% in 2014 to approximately 25% today. Global projections indicate that the number of IoT-connected devices is expected to reach 43 billion by 2030, nearly tripling from the figures in 2018. O... » read more

Radiation, Temperature, Power Challenges For Chips In Space

By Liz Allan - 07 May, 2025 - Comments: 0

Mission-critical hardware used in space is not supposed to fail at all, because lives may be lost in addition to resources, availability, performance, and budgets. For space applications, failure can occur due to a range of factors, including the weather on the day of launch, human error, environmental conditions, unexpected or unknown hazards and degradation of parts to chemical factors, aging... » read more

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Chip Industry Week in Review

Best Practices For Power-Aware Verification: Because Designing For Low Power Is Only Half The Battle

Die-to-die Interconnect Standards In Flux

Development Flows For Chiplets

Blog Review: May 14

Chip Industry Week in Review

Shifting Left With DFT To Optimize Productivity, Testability, And Time-To-Market

Identifying Sources Of Silent Data Corruption

IoT Security By Design

Radiation, Temperature, Power Challenges For Chips In Space

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