Low Power-High Performance

Top Stories

3D-IC For The Masses

Advanced assemblies have enabled an unprecedented rate of advancement in the data center, especially for neural processing, but can it expand beyon...

Chiplets Add New Power Issues

Well-understood challenges become much more complicated when SoCs are disaggregated.

Integrating Data From Design, Manufacturing, And The Field

Knowing where circuits came from, and the conditions in which they operate, can help designers optimize devices already in the field.

What Scares Chip Engineers About Generative AI

ChatGPT isn’t coming for your job, but that doesn’t mean there’s nothing to be concerned about.

Signal Integrity Plays Increasingly Critical Role In Chip...

Chiplet design engineers have complex new considerations compared to PCB concepts.

Normalization Keeps AI Numbers In Check

It’s mostly for data scientists, but not always.

What Exactly Is Multi-Physics?

The chip industry's new buzzword comes with lots of implications and some vague definitions.

Power Budgets Optimized By Managing Glitch Power

While not a focus until now, earlier readings can be made in design to better understand the impact of glitch power.

2025: So Many Possibilities

This will be an incredible year for innovation, driven by AI and for AI, and pushing the limits of fundamental physics.

What’s The Best Way To Sell An Inference Engine?

The hardware choices for AI inference engines are chips, chiplets, and IP. Multiple considerations must be weighed.

More Top Stories »



Round Tables

What Scares Chip Engineers About Generative AI

ChatGPT isn’t coming for your job, but that doesn’t mean there’s nothing to be concerned about.

AI Won’t Replace Subject Matter Experts

But it could help with mundane tasks, freeing up designers to focus on more intricate problems.

Aging, Complexity, And AI In Analog Design

Where digital and analog designs are overlapping, and why it's becoming more difficult to ensure they work as expected over their lifetimes.

Big Changes Ahead For Analog Design

In-house flows are unable to keep up with foundry PDKs and heterogeneous integration, but commercial EDA tools add their own set of challenges.

Unbundling Analog From Digital Where It Makes Sense

The shift toward heterogeneous integration and advanced packaging have changed the dynamics of mixed-signal design — and created some new issues.

More Roundtables »



Multimedia

The Road To Super Chips

Challenges in achieving orders of magnitude performance improvements in processors.

Next-Gen High-Speed Communication In Data Centers

New approaches to moving more data faster and more efficiently.

Real-World Applications Of Computational Fluid Dynamics

How faster processing is revolutionizing different industries.

Making Electronics More Efficient

Challenges and future directions for disaggregating SoCs.

Challenges With Chiplets And Power Delivery

Benefits and challenges in heterogeneous integration.

More Multimedia »



See All Posts in Low Power-High Performance »

Latest Blogs

IP And LP In SoCs

Easier Assertion Development And Debug With Simulation Re...

Make each iteration of the compile-run-debug loop much shorter by replacing t...
March 13, 2025
A Bit About Memory

Enabling Next-Generation Automotive Zonal Architecture Wi...

Robust and reliable data transmission protocols are necessary to handle incre...
March 13, 2025
Best Of Both: LP & HP

Fulfilling 3D-IC Trade-Off Analyses (And Benefits) With A...

AI optimization engines can play a role in finding global, optimal solutions ...
March 13, 2025
Everything Low Power

Static Timing Analysis: Cell Delay Vs. Cell Drive Strength

Choose the appropriate drive strength to meet timing constraints while minimi...
March 13, 2025
Power Source

The Importance Of Safety Analysis In Automotive Systems E...

The challenges automotive manufacturers face in meeting ISO 26262 functional ...
March 13, 2025
At The Core

Physics Simulation With Graph Neural Networks Targeting M...

Predict dynamic behaviors in a physics system in a way that's computationally...
March 13, 2025
Embedded ML Design

No Fooling With Voxel Pooling

Porting functions that don't exist in common graph manipulation tools to an NPU.
March 13, 2025
Spotlight On Reliability

Advanced Packaging: A Curse Or A Blessing For Trustworthi...

Reduce risk by distributing the security-critical functionality of a system a...
January 16, 2025
Inside Edge AI Processing

NPU Acceleration For Multimodal LLMs

Processing input data from multiple modalities on mobile and embedded devices.
December 12, 2024
MIPI And Beyond

MIPI In Next Generation Of AI IoT Devices At The Edge

IoT demands a balance between cloud and edge processing to optimize system pe...
April 11, 2024

Knowledge Centers
Entities, people and technologies explored


  Trending Articles

Linear Pluggable Optics Save Energy In Data Centers

New OIF electrical standards will enable interoperability, adding another option for faster and more efficient data movement.

Chip Industry Week In Review

ASML-imec deal; Intel Foundry's future; European tech consortium; photonics-related acquisitions; global chip market up; new security IP and algorithms; neuromorphic AI chip; adaptive MCUs; auto superbrains.

Challenges Grow For Medical ICs

Making devices that are defect-free and able to withstand years of harsh environments is made more difficult by a combination of low volume and high complexity.

Chip Industry Week In Review

Malaysia design deal with Arm; strong IC sales; Europe's HPC independence push; CHIPS Act clawback clause; Allegro spurns offer; TSMC $100B U.S. deal; Intel's chain of custody; Microchip restructures; auto RISC-V.

Chip Industry Week In Review

Intel fab delay; Apple's $500B pledge; NIST's secure manufacturing plan; imec's high-NA milestone; SkyWater's fab purchase; GF-MIT deal; Australia's gallium; GPU IP; semi equipment market; AWS quantum chip; Arm's edge AI platform.