Advanced Packaging Drives Test And Metrology Innovations
Complex devices are pushing test and metrology tools to their limits, but solutions are coming online.
Yield Management Embraces Expanding Role
From wafer maps to lifecycle management, yield strategies go wide and deep with big data.
Balancing Parallel Test Productivity With Yield & Cost
Expensive DUT interface boards complicate development and operations.
Metrology Advances Step Up To Sub-2nm Device Node Needs
Fab processes that enable stacked transistors, hybrid bonding, and advanced packaging are driving the need for more and better measurements.
New Challenges In IC Reliability
How advanced packaging, denser circuits, and safety-critical markets are altering chip and system design.
Defect Challenges Grow At The Wafer Edge
Better measurement of edge defects can enable higher yield while preventing catastrophic wafer breakage, but the number of possible defects is incr...
Promises and Perils of Parallel Test
Test costs may be reduced, but how much depends on a whole bunch of factors.
Standardizing Defect Coverage In Analog/Mixed Signal Test
IEEE P2427 is poised to be the cornerstone in the testing and validation of AMS designs; full industry support is still developing.
AI/ML’s Role In Design And Test Expands
But it's not always clear where it works best or how it will impact design-to-test time.
Metrology And Inspection For The Chiplet Era
Recent developments address imminent needs of advanced nodes and packages, but not all the pieces are in place yet.
New Challenges In IC Reliability
How advanced packaging, denser circuits, and safety-critical markets are altering chip and system design.
What’s Missing In Test
Different types of test all work, but catching every real and potential issue remains a challenge.
Doing More At Functional Test
New approaches for cutting costs and improving reliability for increasingly complex chips.
Inspection, Metrology Issues In Advanced Packages
How to ensure that chips and chiplets will work as expected inside a package.
Applying ML In Failure Analysis
When and where machine learning is best used, and how to choose the right model.
Real-Time Safety Monitoring
How do you know when a safety-critical chip is working properly?
Making Adaptive Test Work Better
How to manage more data efficiently during test.
Overlay Optimization In Advanced IC Substrates
How analytics can improve yield in high-volume manufacturing of panels.
Cost And Quality Of Chiplets
Why adaptive test is becoming necessary in heterogeneous designs.
Yield Tracking In RDL
How to identify defects in panel-level packages, and why that's needed for generative AI in data centers.
