Systems & Design

Top Stories

Improving Verification Methodologies

The verification problem space is outpacing the speed of the tools, placing an increasing burden on verification methodologies and automation impro...

Lines Blurring Between Supercomputing And HPC

Acceleration of performance improvements due to AI and disaggregation are driving significant changes at the leading edge of computing.

Multi-Die Design Complicates Data Management

Design data and metadata are ballooning, and no one is quite sure how long to save it or what to delete.

Universities Augment Engineering Curricula To Boost Emplo...

Companies need engineers across all disciplines and universities are stepping up to deliver them; schools reap benefits, too.

AI In Data Management Has Limits

Trusting which data to use and what can be deleted still requires human oversight; startups are at a disadvantage.

Chip Architectures Becoming Much More Complex With Chiplets

Options for how to build systems increase, but so do integration issues.

Design Customization Puts Heavy Burden On Verification

Configurability causes an explosion in verification complexity, but the upside is verification engineers are gaining in stature.

Startup Challenges In A Changing EDA World

Without innovation, it may not be possible to fully utilize technological advances.

Startup Funding: Q4 2024

AI chips and interconnects end year on high note; $3 billion for 75 companies.

Top Tech Videos Of 2024

What chip industry engineers watched in 2024.

More Top Stories »



Round Tables

Design Customization Puts Heavy Burden On Verification

Configurability causes an explosion in verification complexity, but the upside is verification engineers are gaining in stature.

RISC-V Profiles Help Conformance

More than just the processor needs to be defined for standard operating systems. Profiles help a little, but still not enough.

How AI Is Transforming System Design

LLMs and machine learning are automating expertise in an aging workforce.

RISC-V’s Software Portability Challenge

A hardware-software contract is needed for software portability, but RISC-V is not yet defined well enough to know what that is.

RISC-V Conformance

Finding out if a processor implementation matches the specification is important, but conformance testing is currently not available.

More Roundtables »



Multimedia

Cracking The Memory Wall

How faster data movement can impact overall system performance.

PCIe Over Optics

The benefits and tradeoffs of using optics to move data.

Livelocks And Deadlocks In NoCs

How to prevent complex systems from freezing up.

Distributed Voltage And Frequency Scaling Gaining Traction

More data to process with fewer available knobs to turn are boosting demand for this technique.

The Evolution of HBM

From 2.5D to AI everywhere.

More Multimedia »



See All Posts in System-Level Design »

Latest Blogs

A System Perspective

Simplifying HW/SW Co-Verification With PSS Led UVM And C ...

Create reusable and adaptable verification scenarios across multiple platforms.
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Intelligent System Design

AI’s Rapid Growth: The Crucial Role Of High Bandwid...

Every fractional increase in HBM subsystem performance has a multiplier effec...
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First By Design

Key Challenges In Scaling AI Clusters

Rapid AI innovations are putting unprecedented strain on data center networks.
February 27, 2025
Looking Past The Horizon

Bold Prediction: 50% Of New HPC Chip Designs Will Be Mult...

Advancements in low-latency interconnects, manufacturing processes, and desig...
February 27, 2025
NoC NoC

Top 5 Reasons Engineers Need A Smart NoC

Automatically generate, optimize, and verify interconnects with minimal manua...
February 27, 2025
The Next Wave

UCIe For 1.6T Interconnects In Next-Gen I/O Chiplets For ...

Infrastructure architecture for AI data centers requires a new design paradigm.
February 3, 2025
Memory/IO Wall Solutions

AI Infrastructure At A Crossroads

Weighing efficiency gains vs. the scale of personalization.
January 30, 2025
Making Formal Normal

Corner-Case Bug Hunting for RISC-V

Nice to have, or an imperative?
September 30, 2024
The Chiplet Connection

Enabling Innovative Multi-Vendor Chiplet-Based Designs

What makes chiplets so attractive, and why they are essential for future desi...
September 26, 2024
Clock Talk

Droop And Silent Data Corruption

Advanced silicon lifecycle analytics and on-die telemetry are needed to count...
July 25, 2024

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Entities, people and technologies explored


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