Startup Funding: Q3 2024
New startups emerge from stealth; 75 companies raise $2 billion.
Barriers To Chiplet Sockets
Perfection sometimes stands in the way of progress, and there is evidence this may be happening with chiplets. It may be time to slow down and make...
Using AI To Glue Disparate IC Ecosystem Data
Why the chip industry is so focused on large language models for designing and manufacturing chips, and what problems need to be solved to realize ...
RAG-Enabled AI Stops Hallucinations, Adds Sources
New GenAI method enables better answers and performs more functions.
Pressure Builds To Adopt Virtual Prototypes
Creating complex multi-chiplet systems is no longer a back-of-the-envelope diagram, but viable methodologies are still in short supply.
What Comes After HBM For Chiplets
The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken ...
New AI Processors Architectures Balance Speed With Effici...
Hot Chips 24: Large language models ratchet up pressure for sustainable computing and heterogeneous integration; data management becomes key differ...
AI’s Role In Chip Design Widens, Drawing In New Sta...
Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.
Edge Devices Require New Security Approaches
More attack points and more valuable data are driving new approaches and regulations.
Defining The Chiplet Socket
The industry may have started with the wrong approach for enabling a third-party chiplet ecosystem, but who will step in and fix it?
More Top Stories »
Barriers To Chiplet Sockets
Perfection sometimes stands in the way of progress, and there is evidence this may be happening with chiplets. It may be time to slow down and make...
What Comes After HBM For Chiplets
The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken ...
Defining The Chiplet Socket
The industry may have started with the wrong approach for enabling a third-party chiplet ecosystem, but who will step in and fix it?
Developing Workflows To Streamline System-Level Design
EDA tool providers will serve as powerful allies for customers to develop and implement workflows, and to show them what's possible.
Focus Shifts To Application-Specific Workloads
System-level design is in constant flux, making it difficult to set standards or develop flows and tools.
More Roundtables »
Working With Chiplets
What comes after HBM, and why that matters for future designs.
Data Routing In Heterogeneous Chip Designs
Challenges and solutions for working with multiple chiplets.
Changes In Formal Verification
Errors in chiplets, automotive safety, processors become key targets.
Promises And Pitfalls Of SoC Restructuring
Sidestepping data incompatibility issues in heterogeneous chip designs.
Electromigration And IR Drop At Advanced Nodes
How to achieve a DRC-clean, manufacturing-ready design at advanced nodes.
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