Systems & Design

Top Stories

From Tool Agents To Flow Agents
The industry has already demonstrated gains using AI in tight iteration loops, but how does that evolve to cover larger portions of the development...
Published on April 30th, 2025 by Brian Bailey

AI Drives Re-Engineering Of Nearly Everything In Chips
Complexity, uncertainty, and lots of moving pieces will challenge the semiconductor industry for years to come.
Published on April 24th, 2025 by Ed Sperling

New Ways To Improve EDA Productivity
A multi-faceted approach is required to deal with growing complexity and a shortage of engineers.
Published on April 24th, 2025 by Ann Mutschler

Analog Creates Ripples in Digital Verification
While analog and digital verification efforts have been essentially separated, closer integration is resulting in a rethinking of standards.
Published on April 24th, 2025 by Brian Bailey

AI Agents Need Goals
AI cannot optimize unless it can measure progress towards goals, but defining those goals is not easy, especially when looking at the entire develo...
Published on April 16th, 2025 by Brian Bailey

Startup Funding: Q1 2025
AI chips and data center communications see big funding; 75 startups raise $2 billion.
Published on April 2nd, 2025 by Jesse Allen

Challenges In Managing Chiplet Resources
The chip industry is exploring multiple avenues for simplifying multi-die integration, but difficulties remain for optimizing designs.
Published on March 27th, 2025 by Ann Mutschler

First-Time Silicon Success Plummets
Number of designs that are late increases. Rapidly rising complexity is the leading cause, but tools, training, and workflows need to improve.
Published on March 27th, 2025 by Ed Sperling

Digital Twins For Design And Verification Workflows
Can we model the chip development flow so AI could optimize it?
Published on March 27th, 2025 by Brian Bailey

The Evolving Role Of AI In Verification
Semiconductor verification is changing to integrate AI with human expertise.
Published on March 26th, 2025 by Ann Mutschler

More Top Stories »



Round Tables

From Tool Agents To Flow Agents
The industry has already demonstrated gains using AI in tight iteration loops, but how does that evolve to cover larger portions of the development...
Published on April 30th, 2025 by Brian Bailey

AI Agents Need Goals
AI cannot optimize unless it can measure progress towards goals, but defining those goals is not easy, especially when looking at the entire develo...
Published on April 16th, 2025 by Brian Bailey

Digital Twins For Design And Verification Workflows
Can we model the chip development flow so AI could optimize it?
Published on March 27th, 2025 by Brian Bailey

The Evolving Role Of AI In Verification
Semiconductor verification is changing to integrate AI with human expertise.
Published on March 26th, 2025 by Ann Mutschler

Verification Experts Vs. Generalists
The increasing complexity of design is driving specialization and innovative approaches in verification — and some interesting arguments.
Published on March 5th, 2025 by Ann Mutschler

More Roundtables »



Multimedia

Speeding Up Die-To-Die Interconnectivity
Just adding more or thicker wires to a design isn't sufficient with chiplets.
Published on May 14th, 2025 by Ed Sperling

What’s Changing In SerDes
Faster data movement in AI systems comes at a cost.
Published on April 16th, 2025 by Ed Sperling

Optimizing Data Movement In SoCs And Advanced Packages
Managing on-chip data is becoming more challenging in the AI era.
Published on March 18th, 2025 by Ed Sperling

Scenario Coverage In Formal Verification
As complexity of designs increases, so does the need for coverage in context.
Published on March 5th, 2025 by Ed Sperling

Cracking The Memory Wall
How faster data movement can impact overall system performance.
Published on February 26th, 2025 by Ed Sperling

More Multimedia »



See All Posts in System-Level Design »

Latest Blogs

Making Formal Normal

How To Optimize Silicon Utilization To Improve PPA
As designs grow more complex, detecting and eliminating underutilized compone...
April 29, 2025
by Ashish Darbari
NoC NoC

Data Movement Is the Energy Bottleneck of Today’s SoCs
A NoC provides a structured and scalable approach to transporting data betwee...
April 24, 2025
by Andy Nightingale
Looking Past The Horizon

AI-Driven Verification Regression Management
Automation of repetitive steps with proactive management to measure efficacy ...
April 24, 2025
by Paul Carzola
A System Perspective

Reap Rewards With Shift-Left Pattern Matching For Custom ...
Reduce design iterations and improve product quality by moving critical check...
April 24, 2025
by John Muirhead
Intelligent System Design

NOP Flit Payload: A Dedicated Debug Channel
Capturing a granular view of link operation using specialized data packets de...
April 24, 2025
by Geeta Arora
First By Design

What Is Electronic Design Automation And Why Do You Need It?
EDA software is revolutionizing high-speed digital design by accelerating tim...
April 24, 2025
by Roberto Piacentini Filho
The Next Wave

Unleashing AI Potential Through Advanced Chiplet Architec...
Chiplets are the only viable solution to maintain the annual cadence of hardw...
March 27, 2025
by Tony Chan Carusone
Memory/IO Wall Solutions

AI Infrastructure At A Crossroads
Weighing efficiency gains vs. the scale of personalization.
January 30, 2025
by Ramin Farjadrad
The Chiplet Connection

Enabling Innovative Multi-Vendor Chiplet-Based Designs
What makes chiplets so attractive, and why they are essential for future desi...
September 26, 2024
by Elad Alon
Clock Talk

Droop And Silent Data Corruption
Advanced silicon lifecycle analytics and on-die telemetry are needed to count...
July 25, 2024
by Aakash Jani

Knowledge Centers
Entities, people and technologies explored


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