System-Level Design

Top Stories

The Other Side Of Makimoto’s Wave
Custom design is gaining ground against standardized approaches in a variety of new applications.
Published on March 6th,  2019 by Ann Steffora Mutschler

New Design Approaches At 7/5nm
Smaller features and AI are creating system-level issues, but traditional ways of solving these problems don't always work.
Published on March 4th,  2019 by Ed Sperling

The Challenge Of RISC-V Compliance
Showing that a processor core adheres to a specification becomes more difficult when the specification is extensible.
Published on February 28th,  2019 by Brian Bailey

The Problem With Post-Silicon Debug
Rising costs, tighter market windows and more heterogeneous designs are forcing chipmakers to rethink fundamental design approaches.
Published on February 28th,  2019 by Ann Steffora Mutschler

Can Debug Be Tamed?
Can machine learning bring debug back under control?
Published on February 28th,  2019 by Brian Bailey

Partitioning Drives Architectural Considerations
Experts at the Table, part 2: Biggest tradeoffs in partitioning.
Published on February 25th,  2019 by Ann Steffora Mutschler

Pushing AI Into The Mainstream
Why data scrubbing and social issues could limit the speed of adoption and the usefulness of this technology.
Published on January 31st,  2019 by Brian Bailey

Using Memory Differently
Optimizing complex chips requires decisions about overall system architecture, and memory is a key variable.
Published on January 31st,  2019 by Ann Steffora Mutschler

EDA Grabs Bigger Slice Of Chip Market
Manufacturing, packaging and development tools always have earned a fixed percentage of IC revenue, but that could change.
Published on January 31st,  2019 by Brian Bailey

Chip Industry In Rapid Transition
Wally Rhines, Mentor's CEO Emeritus, points to big shifts caused by AI, customization, uncertainty in the global economy and a changing customer base.
Published on January 9th,  2019 by Ed Sperling

More Top Stories »



Round Tables

Partitioning Drives Architectural Considerations
Experts at the Table, part 2: Biggest tradeoffs in partitioning.
Published on February 25th,  2019 by Ann Steffora Mutschler

Making IP Friendlier
Experts at the Table, part 2: Some IP issues remain unsolved even after 20 years. What the IP industry needs to change for growth.
Published on December 27th,  2018 by Brian Bailey

IP Tracking and Management
Experts at the Table, part 1: What are the important elements of an IP tracking and management system for providers and users?
Published on November 29th,  2018 by Brian Bailey

The Impact of Domain Crossing on Safety
Experts at the Table, part 3: What addition problems does this create in application areas, such as automotive? When will we see more automated sol...
Published on October 31st,  2018 by Brian Bailey

So Many Waivers Hiding Issues
Experts at the Table, part 2: Domain crossings can produce thousands of waivers. How does a team put in place a methodology for dealing with them?
Published on October 5th,  2018 by Brian Bailey

More Roundtables »



Multimedia

New Memory Options
Using data as the starting point for designs opens up new architectural choices.
Published on February 28th,  2019 by Ed Sperling

Reverse Debug
How to reduce time spent on debugging complex chips.
Published on February 28th,  2019 by Ed Sperling

More Than A Core
A system-level look at integration, security, and new architectures such as RISC-V.
Published on December 20th,  2018 by Ann Steffora Mutschler

Formal Signoff
What makes one assertion better than another?
Published on December 4th,  2018 by Ed Sperling

Heterogeneous Computing Verification
How to verify increasingly complex chips.
Published on November 28th,  2018 by Ed Sperling

More Multimedia »



See All Posts in System-Level Design »

Latest Blogs

Editor's Note

Crisis In Data
Before the industry begins shifting to a data-driven approach, ground rules n...
February 28, 2019
by Ed Sperling
What Were They Thinking

Follow The Data
Does antitrust law need changing for the data age? The discussion has started...
by Brian Bailey
A System Perspective

The Time Is Now For A Common Model Interface
Devices need to operate reliably for longer than ever before, making aging si...
by Ahmed Ramadan
Looking Past The Horizon

Accelerate SSD Software Development And System Validation
Start development early on the complex firmware required by next generation S...
by Tom De Schutter
Frankly Speaking

Hot Technologies In Cold Weather
Five top takeaways from Embedded World 2019, from safety and security to ecos...
by Frank Schirrmeister
Just A Formality

Formal Verification Of RISC-V Cores
As RISC-V offerings expand, it's vital to make sure they conform to the ISA s...
by Sven Beyer
Programmed Complexity

Inaccurate Assumptions Mean Software Issues
Embedded software development is no longer a one-dimensional problem, and too...
by Andrew Caples
Intelligent Analytics

The Rapid Rise Of RISC-V
The open source ISA's ecosystem takes big steps forward with the latest found...
by Andy Gothard
Semi Thoughts

A Conference For The Ages
Presenting a paper at the storied ISSCC.
by Mike Gianfagna
Design & Verification

Deep Learning Hardware: FPGA vs. GPU
While GPUs are well-positioned in machine learning, data type flexibility and...
December 20, 2018
by Farhad Fallahlalehzari
Against The Grain

Make-Or-Break Time For Portable Stimulus
We hear a lot from vendors about the new Portable Stimulus Standard, but how ...
October 25, 2018
by Neil Johnson

Knowledge Centers
Entities, people and technologies explored


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Better algorithms and more data could bolster adoption, particularly at advanced nodes.

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