Packaging, Test & Materials

Top Stories

Advanced Packaging Confusion

Number of options and naming conventions are causing consternation throughout the semiconductor supply chain.

The Growing Materials Challenge

New applications and continued device scaling are putting increasing emphasis on materials engineering.

Extending The IC Roadmap

Imec's An Steegen sees advanced packaging as a critical component of future scaling, including new bridge technology.

Hardware-In-The-Loop Simulation, Testing

HIL simulation and testing is gaining new attention for embedded electronics in safety-critical markets.

Integrating Memristors For Neuromorphic Computing

The latest research on memory, variability, and compute architectures—and what comes next.

OSAT Consolidation Continues

The merger of ASE Group and SPIL alters the competitive landscape, but more changes are still ahead.

MIS Packaging Takes Off

Molded interconnect substrate emerges as packaging choice for analog, power ICs and cryptocurrency chips.

Software-Defined Test And Measurement

SDx is making inroads into 5G, automotive radar, and other new technology.

Packaging Chips For Cars

Why packaging is becoming increasingly critical and difficult in the automotive market.

Choosing The Right Interconnect

Packaging options increasing as chipmakers vie for higher performance, lower power and faster time to market.

More Top Stories »



Round Tables

2.5D Surprises And Alternatives

First of two parts: Cost and supply chain issues remain as advanced packaging begins to ramp.

Stacked Die Changes

Experts at the table, part 3: How mature are high-speed interconnects and what hurdles remain for widespread adoption.

Stacked Die Changes

Experts at the table, part 2: Different coefficients of thermal expansion cause warpage problems; known good die issues.

Stacked Die Changes

Experts at the table, part 1: There are new and better options for packaging chips together as the semiconductor industry begins to figure out what...

More Roundtables »



Multimedia

Tech Talk: 5G Everywhere

Where 5G works, where it doesn't, and why it's essential for so many markets.

Tech Talk: System In Package

Why advanced packaging is so important for autonomous driving and the semiconductor industry.

Tech Talk: 2.5D Issues

How ready is this packaging approach and what problems remain?

Tech Talk: 14nm And Stacked Die

Why the 14nm node will be long lived, and how it will be used in 2.5D and 3D-IC packages.

Tech Talk: 2.5D Stacked Die

What's the real motivation behind stacking die?

More Multimedia »



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Latest Blogs

Editor's Note

New Transistor Types Vs. Packaging

No one is quite sure what comes next, and that's not a good thing.
June 11, 2018
All About Test

The Best in Test

VLSI Research recognizes leading test vendors.
Material Science

Temporary Bonding: Enabling the Next Generation of Ultrat...

What's necessary to enable continued scaling and 3D integration.
The Human Machine Interface

Heart Of A Champion

Prosthetics have come a long way, but would athletes gain unfair advantage by...
Accelerating Design & Test

Toward Project-Based Learning

The value of student-centered instruction over an extended period of time.
May 7, 2018
Riding The Silicon Rapids

How The Brain Saves Energy By Doing Less

No matter how efficient they become, neuromorphic computers are fundamentally...
March 15, 2018
The Connected Perspective

2017: A Good Year for ATE

Test equipment sales were up, and so were the share prices of ATE stocks.
January 8, 2018
Inside Big Data

Is It Safe To Assume That All “Passed” Die Ar...

Detecting tricky test escapes and preventing defective parts from getting int...
October 9, 2017
EDA For Manufacturability

Crossing The Chasm: Uniting SoC And Package Verification

EDA companies, OSATs, and foundries must collaborate to ensure wafer-level pa...
March 6, 2017

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