Packaging, Test & Electronic Systems

Top Stories

Shrink Or Package?

Advanced packaging shifts to mainstream with complete flows, better tools, market proof points.

Chip Test Shifts Left

Semiconductor testing moves earlier in the process as quality and reliability become increasingly important.

Security Issues Up With Heterogeneity

Supply chain becomes central focus as more processors and memories are added into devices.

What’s Next In Scaling, Stacking

The 40nm gate-pitch cliff, 3D SoCs with microfluidic cooling, new fan-outs and 2.5D—it's all on the table.

Testing IoT Devices

Microcontrollers and other chips are in the mix.

2.5D, Fan-Out Inspection Issues Grow

Advanced packaging is now mainstream, but making sure these devices work properly while also cutting costs is getting harder.

Wireless Test: Too Many Protocols

Vendors struggle to balance new technologies and markets, and almost perpetual updates, against limited resources.

Wirebond Technology Rolls On

Technology still being used for new applications, years after it was predicted to be phased out.

Intel Inside The Package

Mark Bohr opens up on the company's push into multi-chip solutions, and upcoming issues at 7nm and 5nm.

Time For Massively Parallel Testing

Increasing demand for system-level testing brings changes.

More Top Stories »



Round Tables

2.5D Surprises And Alternatives

First of two parts: Cost and supply chain issues remain as advanced packaging begins to ramp.

Stacked Die Changes

Experts at the table, part 3: How mature are high-speed interconnects and what hurdles remain for widespread adoption.

Stacked Die Changes

Experts at the table, part 2: Different coefficients of thermal expansion cause warpage problems; known good die issues.

Stacked Die Changes

Experts at the table, part 1: There are new and better options for packaging chips together as the semiconductor industry begins to figure out what...

More Roundtables »



Multimedia

Tech Talk: System In Package

Why advanced packaging is so important for autonomous driving and the semiconductor industry.

Tech Talk: 2.5D Issues

How ready is this packaging approach and what problems remain?

Tech Talk: 14nm And Stacked Die

Why the 14nm node will be long lived, and how it will be used in 2.5D and 3D-IC packages.

Tech Talk: 2.5D Stacked Die

What's the real motivation behind stacking die?

More Multimedia »



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Latest Blogs

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Knowledge Centers
Entities, people and technologies explored


  Trending Articles

RISC-V Pros And Cons

Proponents tout freedom for computing architectures, but is the semiconductor ecosystem ready for open-source hardware?

Shrink Or Package?

Advanced packaging shifts to mainstream with complete flows, better tools, market proof points.

NAND Market Hits Speed Bump

Transition from planar to 3D NAND is harder and more time-consuming than expected.

The LiDAR Gold Rush

LiDAR firms attract investments as corporate and venture investors vie for a piece of this burgeoning market.

What’s Next In Scaling, Stacking

The 40nm gate-pitch cliff, 3D SoCs with microfluidic cooling, new fan-outs and 2.5D—it’s all on the table.