category: Test, Measurement and Analytics

category: IoT, Security & Automotive

Using Picosecond Ultrasonic Technology For AI Packages: Part 2
By Cheolkyu Kim - 10 Jul, 2025 - Comments: 0

Heterogeneous integration is a key enabler of today’s AI innovations. By bringing together multiple chips with different functionalities, a.k.a., chiplets, AI devices have been able to achieve tremendous performance gains. However, the heterogeneous integration of advanced packages has its own set of process control obstacles that must be addressed, including new interconnect challenges invol... » read more

GenAI’s Breakneck Pace Is Reshaping The Semiconductor Industry
By Alex Burlak - 10 Jul, 2025 - Comments: 0

Humankind is witnessing a technological revolution so extreme that its full magnitude might extend beyond the scope of our intellect. Generative AI (GenAI) is doubling its performance every six months [1], outpacing Moore's law in what the industry calls Hyper Moore's Law. Some cloud AI chipmakers expect to double or triple performance every year for the next ten years [2]. In this three-part b... » read more

Testing At The Speed Of Light: Enabling Scalable Optical Testing For Silicon Photonics And CPO
By Matthew Griffin - 10 Jul, 2025 - Comments: 0

Today, a single ChatGPT query consumes roughly ten times more power than a traditional Google search and will only continue to grow as AI extends to image and video generation. With this growth not only in AI, but also in cloud computing and high-performance computing (HPC), data center electricity consumption is projected to account for up to 9.1% of total U.S. electricity use by 2030. ... » read more

Addressing Silicon Lifecycle Scaling Demands
By Marc Hutner - 10 Jul, 2025 - Comments: 0

In today’s competitive business landscape, navigating complexity can be a decisive advantage, but it also presents significant challenges. Three crucial trends driving the rise of complexity are technology scaling, design scaling and system scaling. Traditionally, Design for Test (DFT) solutions have focused on the die level; however, these challenges present opportunities at the package and ... » read more

On-chip Monitor Analytics Scales With Silicon Chip Production From NPI Through HVM
By Guy Cortez - 10 Jul, 2025 - Comments: 0

By Guy Cortez and Dan Alexandrescu At the New Product Introduction (NPI) stage of silicon chip production, product engineers work with a limited but critical dataset – typically from initial silicon samples or engineering lots – enabling early assessment of the power and performance of your silicon. Analytics solutions typically have no time-to-results (TTR) issues when the volume of dat... » read more

Easing The Stress For Package-Level Burn-In
By Laura Peters - 10 Jul, 2025 - Comments: 0

Considered something of a necessary evil, burn-in of IC packages during production weeds out latent defects so they don’t turn into failures in the field. But as AI and multi-chiplet packages become more common, and concerns about aging circuitry heighten, shifting stress testing to the wafer level looks increasingly attractive from a quality, throughput, and cost standpoint. The shift is ... » read more

Harnessing The Power Of Data To Remain Competitive
By Jonathan Holt - 10 Jul, 2025 - Comments: 0

The semiconductor industry operates at the forefront of technological innovation, even as manufacturers face constant pressure to improve production yields, manage intricate supply chains, reduce costs and accelerate time to market. Businesses have learned to harness the power of data to optimize decision-making and streamline operations to remain competitive by using PDF Solutions' Exensio ... » read more

How Advanced Packaging Is Reshaping Inspection
By Gregory Haley - 10 Jul, 2025 - Comments: 0

As semiconductor devices continue advancing into more sophisticated packaging schemes, traditional optical inspection technologies are brushing up against physical and computational boundaries. The growing reliance on 2.5D and 3D integration, hybrid bonding, and wafer-level processes has made it much harder to detect defects consistently and early enough to protect yields. While optical insp... » read more

Full Wafer Inspection for Voltage Contrast Systematic Defects Using High-Throughput Point Scan
By PDF Solutions - 10 Jul, 2025 - Comments: 0

Abstract: A next generation system and methodology for high-throughput e-beam hot spot inspection is described. Rather than capturing images of each hot spot, just a single pixel centered on the signal node of each hot spot is collected and used to assess if the hot spot is defective or not. This innovation results in a very substantial savings in time per hot spot, and therefore a tremendous ... » read more

The Data Dilemma In Semiconductor Testing And Why It Matters: Part 2
By Roberto Colecchia - 10 Jul, 2025 - Comments: 0

In Part 1, we explored the challenges of implementing machine learning and real-time analytics in semiconductor testing—chiefly, the difficulty of transferring device test data across multiple locations and organizations. In this post, we introduce Data Feed Forward (DFF) as it applies to ACS Advantest. What is ACS DFF? ACS DFF is a cloud-enabled solution designed to simplify, secure... » read more

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