Low Power-High Performance

Top Stories

Low-Power Design Becomes Even More Complex

New markets, technologies and tradeoffs that span multiple different disciplines are turning this into an increasingly difficult team effort.

Will In-Memory Processing Work?

Changes that sidestep von Neumann architecture could be key to low-power ML hardware.

Wrestling With High-Speed SerDes

Higher performance helps smooth the gap between analog and digital, but it adds a number of new twists.

Circuit Aging Becoming A Critical Consideration

As reliability demands soar in automotive and other safety-related markets, tools vendors are focusing on an area often ignored in the past.

Waiting For Chiplet Interfaces

Plug-and-play approaches are gaining mindshare, even if some of the key pieces are missing.

HBM2 Vs. GDDR6: Tradeoffs In DRAM

Experts at the Table, part 1: Choices vary depending upon application, cost and the need for capacity and bandwidth, but the number of options is c...

In-Chip Monitoring Becoming Essential Below 10nm

Complex interactions and power-related effects require understanding of how chips behave in context of real-world use cases.

Chiplet Momentum Builds, Despite Tradeoffs

Pre-characterized tiles can move Moore's Law forward, but it's not as easy as it looks.

The Growing Uncertainty Of Sign-Off At 7/5nm

Checking the electrical characteristics of circuits is becoming much more challenging.

The Limits Of Energy Harvesting

Why the promise of unlimited power in end devices has achieved only spotty success.

More Top Stories »



Round Tables

HBM2 Vs. GDDR6: Tradeoffs In DRAM

Experts at the Table, part 1: Choices vary depending upon application, cost and the need for capacity and bandwidth, but the number of options is c...

Planning For 5G And The Edge

Experts at the Table, part 2: Understanding 5G's benefits, limitations and design challenges.

Process Variation And Aging

Experts at the Table, part 2: How the very fast progress of the semiconductor industry is making transistor aging even more difficult.

Aging In Advanced Nodes

Experts at the Table, part 1: Why aging and reliability no longer can be addressed with margining in finFETs and automotive applications.

Process Variation Not A Solved Issue

Experts at the Table: Biggest issues with process variation today, and its impacts on the design process.

More Roundtables »



Multimedia

In Memory And Near-Memory Compute

Steven Woo, Rambus fellow and distinguished inventor, talks about the amount of power required to move store data and to move it out of memory to w...

Memory In Microcontrollers

Different approaches where more memory is required.

Memory Options And Tradeoffs

What kinds of memories work best where and why.

Latency Under Load: HBM2 vs. GDDR6

Why choosing memory depends upon data traffic.

New Challenges For Data Centers

Scalability and cost emerge as top issues with increased data volume.

More Multimedia »



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Latest Blogs

Editor's Note

Where 5G Works, And Where It Doesn’t

Just because millimeter wave technology is built into a handset doesn't mean ...
July 16, 2019
Best Of Both: LP & HP

Empowering UPF Commands With Effective Elements Lists

Become more accurate, productive, and consistent by understanding the inheren...
IP And LP In SoCs

Accurate Power Analysis Using Real Software Workloads

Most chip designs now employ low-power design techniques, making accurate est...
A Bit About Memory

GDDR Accelerates Artificial Intelligence And Machine Lear...

Getting enough bandwidth to meet the demands of ever more sophisticated AI/ML...
The Disruptive Edge

Using Technology To Improve Beer And Wine

How a fermentation tank networked communication system is used to ensure the ...
At The Core

Deep Learning Models With MATLAB And Cortex-A

An end-to-end workflow for deploying embedded machine learning.
June 13, 2019
Everything Low Power

IC Test: Doing It At The Right Place At The Right Time

Understand the different DFT technologies to know when to insert them into a ...
March 14, 2019
Let's Talk PVT Monitoring

How To Reduce Thermal Guard-Banding

What a difference a few degrees can make.
February 14, 2019
Electromagnetic Crosstalk

How to Make Sure IP will Float in the Rough SoC Sea

The impact of coupling on designs and what to watch out for.
December 19, 2018
Power Awareness

Aging Analysis Hits Mainstream

Increasingly, the ability to address transistor aging is showing up in EDA to...
November 8, 2018
Spotlight On Reliability

Interaction Of Hard IP And Chip-Package

Conflicting goals make arranging copper pillars or micro bumps around hard IP...

Knowledge Centers
Entities, people and technologies explored


  Trending Articles

5nm Vs. 3nm

Half nodes, different transistor types, and numerous other options are adding uncertainty everywhere.

Will Open-Source EDA Work?

DARPA program pushes for cheaper and simpler tools, but it may not be so easy.

Open Source Processors: Fact Or Fiction?

Calling an open-source processor free isn’t quite accurate.

Will In-Memory Processing Work?

Changes that sidestep von Neumann architecture could be key to low-power ML hardware.

Power Is Limiting Machine Learning Deployments

Rollouts are constrained by the amount of power consumed, and that may get worse before it gets better.