Low Power-High Performance

Top Stories

The Return Of Body Biasing

This technique lets engineering teams reach new power lows, but it's not always so simple.

New Drivers For I/O

Mobile phones are no longer driving I/O standards. Emerging industries take up the lead and idea sharing will help everybody.

Lots Of Little Knobs For Power

A growing list of small changes will be required to keep power, heat, and noise under control at 10/7nm and beyond.

The Next Phase Of Machine Learning

Chipmakers turn to inferencing as the next big opportunity for this technology.

Mixed Messages For Mixed-Signal

What does the future of analog mixed-signal design and verification look like? Can we expect to see any methodology changes?

New Power Concerns At 10/7nm

Dynamic, thermal, packaging and electromagnetic effects grow, and so do the interactions between all of them.

Data Centers Turn To New Memories

DDR5, NVDIMMs, SGRAM, 3D XPoint add more options, but solutions may be a mix and much more complex.

Noise Abatement

Will noise compromise your next design? The only way to answer that is to understand which aspects of noise are getting worse and the availability ...

Power Modeling And Analysis

Experts at the Table, part 3: Juggling accuracy and fidelity while making the problem solvable with finite compute resources and exciting developme...

Managing Peak Power

Slimmer margins and more data create big challenges for 5G mobile devices, infrastructure and within data centers.

More Top Stories »



Round Tables

Power Modeling And Analysis

Experts at the Table, part 3: Juggling accuracy and fidelity while making the problem solvable with finite compute resources and exciting developme...

Power Modeling and Analysis

Experts at the Table, part 2: What does a power model look like and how do you ensure software utilizes power control properly?

Power Modeling And Analysis

Experts at the Table, part 1: Are power models created early enough to be useful, and is that the best approach?

IP Challenges Ahead

Part 2: For the IP industry to remain healthy it has to constantly innovate, but it's getting harder.

Optimization Challenges For 10nm And 7nm

Experts at the Table, Part 3: Modeling accuracy, skin effects and new packaging techniques take center stage.

More Roundtables »



Multimedia

Tech Talk: Near-Threshold Power

A look at the power benefits and performance impact as designs move closer to voltage thresholds.

Tech Talk: 7nm Thermal Effects

The impact of heat on reliability at advanced nodes and in automotive electronics.

Tech Talk: ADAS

What will change in automotive design on the road to autonomous vehicles.

Tech Talk: 7nm Power

Dealing with thermal effects, electromigration and other issues at the most advanced nodes.

Tech Talk: Neural Networks

How to design and implement convolution neural networks, and what to watch out for.

More Multimedia »



See All Posts in Low Power-High Performance »

Latest Blogs

Power Awareness

Getting Power Management Right

There are many technical avenues to managing the power in heterogenous SoCs toda...
Editor's Note

Quantum Madness

Multiple companies focus on qubits as next computing wave, but problems remain. ...
Best Of Both: LP & HP

An Incremental Approach To Reusing Automated Tests From IPs To SoCs

Getting started with portable stimulus at the block, subsystem, and system level...
Electromagnetic Crosstalk

Electromagnetic (EM) Crosstalk Analysis: Unlocking the Mystery

A quick overview of the basic steps involved in EM crosstalk analysis and post-s...
Everything Low Power

The 5G Design Dilemma

On one hand, you can't afford to design silicon for a standard as early as 5G. O...
IP And LP In SoCs

Software Framework Requirements For Embedded Vision

Key factors to consider when choosing an embedded vision system....
A Bit About Memory

The Promises And Challenges Of 7nm

From signal integrity issues to EUV, there are tradeoffs involved with moving to...
Let's Talk PVT Monitoring

The Importance Of Embedded In-Chip Monitoring In Advanced Node CMOS Technology

Increased gate density and process variability have made ensuring acceptable chi...
Power Source

Full-Chip Power Integrity And Reliability Signoff

Why power grid design has become a limiting factor for PPA....
At The Core

AI Technology Is Changing Voice Recognition

What is an embedded glue layer and why does it matter? ...
On-Chip Power Integrity

10nm And 7nm Routability - How Is Your CAD Flow Doing?

Power integrity optimization can no longer be a reactive step in the backend pro...

Knowledge Centers
Entities, people and technologies explored


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