Low Power-High Performance

Top Stories

Aging In Advanced Nodes
Experts at the Table, part 1: Why aging and reliability no longer can be addressed with margining in finFETs and automotive applications.
Published on September 17th,  2018 by Ann Steffora Mutschler

Enabling Cheaper Design
At what point does cheaper design enable a significant growth in custom semiconductor content? Not everyone is onboard with the idea.
Published on September 13th,  2018 by Brian Bailey

Process Corner Explosion
At 7nm and below, modeling what will actually show up in silicon is a lot more complicated.
Published on September 13th,  2018 by Ann Steffora Mutschler

Minimizing Chip Aging Effects
Understanding aging factors within a design can help reduce the likelihood of product failures.
Published on September 13th,  2018 by Brian Bailey

Variation In Low-Power FinFET Designs
Old solutions don't necessarily work anymore, particularly at advanced nodes and ultra-low voltage.
Published on August 30th,  2018 by Ann Steffora Mutschler

AI Architectures Must Change
Using the Von Neumann architecture for artificial intelligence applications is inefficient. What will replace it?
Published on August 13th,  2018 by Brian Bailey

Chip Aging Becomes Design Problem
Assessing the reliability of a device requires adding more physical factors into the analysis, many of which are interconnected in complex ways.
Published on August 9th,  2018 by Brian Bailey

More Processing Everywhere
Arm's CEO contends that a rise in data will fuel massive growth opportunities around AI and IoT, but there are significant challenges in making it ...
Published on August 9th,  2018 by Ed Sperling

Process Variation Not A Solved Issue
Experts at the Table: Biggest issues with process variation today, and its impacts on the design process.
Published on August 9th,  2018 by Ann Steffora Mutschler

On-Chip Monitoring Of FinFETs
Moortec's CEO focuses on simulation's limits at advanced nodes and why a more granular approach is necessary to improve reliability and lower power...
Published on July 25th,  2018 by Ed Sperling

More Top Stories »



Round Tables

Aging In Advanced Nodes
Experts at the Table, part 1: Why aging and reliability no longer can be addressed with margining in finFETs and automotive applications.
Published on September 17th,  2018 by Ann Steffora Mutschler

Process Variation Not A Solved Issue
Experts at the Table: Biggest issues with process variation today, and its impacts on the design process.
Published on August 9th,  2018 by Ann Steffora Mutschler

Architecting For AI
Experts at the Table, part 1: What kind of processing is required for inferencing, what is the best architecture, and can they be debugged?
Published on July 17th,  2018 by Ann Steffora Mutschler

Power Modeling And Analysis
Experts at the Table, part 3: Juggling accuracy and fidelity while making the problem solvable with finite compute resources and exciting developme...
Published on September 27th,  2017 by Brian Bailey

Power Modeling and Analysis
Experts at the Table, part 2: What does a power model look like and how do you ensure software utilizes power control properly?
Published on September 20th,  2017 by Brian Bailey

More Roundtables »



Multimedia

Hybrid Memory
Tech Talk: How long can DRAM scalIng continue?
Published on September 13th,  2018 by Ed Sperling

Huge Performance Gains Ahead
Where the next boosts will come from and why.
Published on August 30th,  2018 by Ed Sperling

UPF-Aware Clock-Domain Crossing
How to minimize the impact of CDC on power at RTL.
Published on August 29th,  2018 by Ed Sperling

Aging Effects
How to model circuit degradation at advanced nodes.
Published on July 17th,  2018 by Ed Sperling

In-Design Power Rail Analysis
What can go wrong with power analysis at advanced nodes.
Published on July 17th,  2018 by Ed Sperling

More Multimedia »



See All Posts in Low Power-High Performance »

Latest Blogs

Electromagnetic Crosstalk

Electromagnetic Analysis and Signoff: Cost Savings
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Editor's Note

The Security Penalty
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Is Your AI SoC Secure?
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Knowledge Centers
Entities, people and technologies explored


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GF Puts 7nm On Hold

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Processing In Memory

Growing volume of data and limited improvements in performance create new opportunities for approaches that never got off the ground.

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Variation In Low-Power FinFET Designs

Old solutions don’t necessarily work anymore, particularly at advanced nodes and ultra-low voltage.

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