Low Power-High Performance

Top Stories

Aging In Advanced Nodes

Experts at the Table, part 1: Why aging and reliability no longer can be addressed with margining in finFETs and automotive applications.

Enabling Cheaper Design

At what point does cheaper design enable a significant growth in custom semiconductor content? Not everyone is onboard with the idea.

Process Corner Explosion

At 7nm and below, modeling what will actually show up in silicon is a lot more complicated.

Minimizing Chip Aging Effects

Understanding aging factors within a design can help reduce the likelihood of product failures.

Variation In Low-Power FinFET Designs

Old solutions don't necessarily work anymore, particularly at advanced nodes and ultra-low voltage.

AI Architectures Must Change

Using the Von Neumann architecture for artificial intelligence applications is inefficient. What will replace it?

Chip Aging Becomes Design Problem

Assessing the reliability of a device requires adding more physical factors into the analysis, many of which are interconnected in complex ways.

More Processing Everywhere

Arm's CEO contends that a rise in data will fuel massive growth opportunities around AI and IoT, but there are significant challenges in making it ...

Process Variation Not A Solved Issue

Experts at the Table: Biggest issues with process variation today, and its impacts on the design process.

On-Chip Monitoring Of FinFETs

Moortec's CEO focuses on simulation's limits at advanced nodes and why a more granular approach is necessary to improve reliability and lower power...

More Top Stories »



Round Tables

Aging In Advanced Nodes

Experts at the Table, part 1: Why aging and reliability no longer can be addressed with margining in finFETs and automotive applications.

Process Variation Not A Solved Issue

Experts at the Table: Biggest issues with process variation today, and its impacts on the design process.

Architecting For AI

Experts at the Table, part 1: What kind of processing is required for inferencing, what is the best architecture, and can they be debugged?

Power Modeling And Analysis

Experts at the Table, part 3: Juggling accuracy and fidelity while making the problem solvable with finite compute resources and exciting developme...

Power Modeling and Analysis

Experts at the Table, part 2: What does a power model look like and how do you ensure software utilizes power control properly?

More Roundtables »



Multimedia

Hybrid Memory

Tech Talk: How long can DRAM scalIng continue?

Huge Performance Gains Ahead

Where the next boosts will come from and why.

UPF-Aware Clock-Domain Crossing

How to minimize the impact of CDC on power at RTL.

Aging Effects

How to model circuit degradation at advanced nodes.

In-Design Power Rail Analysis

What can go wrong with power analysis at advanced nodes.

More Multimedia »



See All Posts in Low Power-High Performance »

Latest Blogs

Electromagnetic Crosstalk

Electromagnetic Analysis and Signoff: Cost Savings

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Editor's Note

The Security Penalty

Just building systems based on speed now comes with a well-publicized risk.
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Best Of Both: LP & HP

Solving Puzzling Power-Aware Coverage: Getting An Aggrega...

How to fit low power coverage into the entire functional verification environ...
Everything Low Power

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At the latest nodes, it is becoming impossible to analyze IR drop correctly, ...
Spotlight On Reliability

Mission Profiles

The current state and future development of a key concept of reliability asse...
Let's Talk PVT Monitoring

5 Reasons Why In-Chip Monitoring Is Here To Stay

From identifying hot spots to individualizing optimization schemes, it's impo...
IP And LP In SoCs

Is Your AI SoC Secure?

Where security is needed in AI environments.
At The Core

Open Throttle On Automotive Innovation

Functional safety takes focus as the autonomous and semi-autonomous vehicle m...
A Bit About Memory

High-Performance Memory At Low Cost Per Bit

Emerging applications drive the need for high memory capacity.
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Power Source

Getting Ahead With Early Power Analysis

Increased power density is causing mounting power and thermal concerns that n...
Power Awareness

Heterogeneous Hubbub

The combination of heterogenous architectures and RISC-V is encouraging new t...
March 8, 2018

Knowledge Centers
Entities, people and technologies explored


  Trending Articles

GF Puts 7nm On Hold

Foundry forms ASIC subsidiary as it focuses on 14nm/12nm and above.

Processing In Memory

Growing volume of data and limited improvements in performance create new opportunities for approaches that never got off the ground.

People Vs. Self-Driving Cars

Why auto tech companies are so concerned about interactions with humans.

Intel’s Next Move

Company’s push into deep learning opens door to a variety of new architectures, including tiles, advanced packaging and more customized solutions.

Variation In Low-Power FinFET Designs

Old solutions don’t necessarily work anymore, particularly at advanced nodes and ultra-low voltage.