Low Power-High Performance

Top Stories

Managing Peak Power

Slimmer margins and more data create big challenges for 5G mobile devices, infrastructure and within data centers.

Power Modeling and Analysis

Experts at the Table, part 2: What does a power model look like and how do you ensure software utilizes power control properly?

Frenzy At 10/7nm

Focus is on cutting costs across the board, and it turns out there is still quite a bit to cut.

Multi-Physics Combats Commoditization

In a world of billion-gate designs, it is increasingly difficult to create a differentiated product without incorporating multi-physics elements.

How Reliable Are FinFETs?

Chipmakers wrestle with EOS, ESD and other power-related issues as leading-edge chips are incorporated into industrial and automotive applications.

Using CNNs To Speed Up Systems

Just relying on faster processor clock speeds isn't sufficient for vision processing, and the idea is spreading to other markets.

Is Design Innovation Slowing?

The answer appears to be a resounding no, but innovation isn't necessarily happening in the same places as in the past.

Dealing With System-Level Power

New tools, standards, languages and methodologies will be necessary to automate growing challenges at all process nodes.

IoT Myth Busting

How cost-sensitive are IoT edge devices, what are the real drivers for this industry, and what is the impact on EDA and IP?

Transistor Aging Intensifies At 10/7nm And Below

Device degradation becomes limiting factor in IC scaling, and a significant challenge in advanced SoCs.

More Top Stories »



Round Tables

Power Modeling and Analysis

Experts at the Table, part 2: What does a power model look like and how do you ensure software utilizes power control properly?

Power Modeling And Analysis

Experts at the Table, part 1: Are power models created early enough to be useful, and is that the best approach?

IP Challenges Ahead

Part 2: For the IP industry to remain healthy it has to constantly innovate, but it's getting harder.

Optimization Challenges For 10nm And 7nm

Experts at the Table, Part 3: Modeling accuracy, skin effects and new packaging techniques take center stage.

The Future Of Memory

Experts at the table, part 3: Security, process variation, shortage of other IP at advanced nodes, and too many foundry processes.

More Roundtables »



Multimedia

Tech Talk: 7nm Thermal Effects

The impact of heat on reliability at advanced nodes and in automotive electronics.

Tech Talk: ADAS

What will change in automotive design on the road to autonomous vehicles.

Tech Talk: 7nm Power

Dealing with thermal effects, electromigration and other issues at the most advanced nodes.

Tech Talk: Neural Networks

How to design and implement convolution neural networks, and what to watch out for.

Tech Talk: Power Signoff

A look at the impact of margin in advanced designs and how to ensure there is sufficient coverage.

More Multimedia »



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Latest Blogs

At The Core

AI Technology Is Changing Voice Recognition

What is an embedded glue layer and why does it matter? ...
Power Source

Addressing Thermal Reliability In Next-Gen FinFET Designs

How to reduce the effects of heat while minimizing design time....
Editor's Note

What's After 7nm?

Power and performance will continue to improve, but not necessarily because ever...
Power Awareness

DARPA CHIPS Program Pushes For Chiplets

The U.S. government takes its own approach to heterogenous integration. ...
Electromagnetic Crosstalk

Noise Issues At 10nm And Below

What is electromagnetic crosstalk and how do you deal with it?...
IP And LP In SoCs

CCIX – What And Why?

Examining the specification's key benefits for high-performance applications....
Best Of Both: LP & HP

How Virtual Emulation Gives The Storage Market A Leg Up

Verifying complex SSD controllers requires more flexibility, earlier....
A Bit About Memory

NVDIMM Market Buoyed By Evolving Data Center Demands

NVDIMM is set to gain ground as support for the memory expands....
Everything Low Power

Expanding Ecosystem Drives Automotive Semiconductor Gold Rush

Automotive chips have been around for more than 40 years. Why all the excitement...
On-Chip Power Integrity

10nm And 7nm Routability - How Is Your CAD Flow Doing?

Power integrity optimization can no longer be a reactive step in the backend pro...

Knowledge Centers
Entities, people and technologies explored


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FPGAs are proving to be versatile for many applications.

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Lam expands into the modeling and analysis market.