Case Study: Monitoring Humidity To Reduce Reticle Haze Effects


Understanding reticle haze: Without proper control measures, immersion technology scanners are affected by an adverse phenomenon called “haze.” Haze is caused by a combination of three specific factors: Click here to continue reading. » read more

Combining Machine Learning With Advanced Outlier Detection To Improve Quality And Lower Cost


In semiconductor manufacturing, a low defect rate of manufactured integrated circuits is crucial. To minimize outgoing device defectivity, thousands of electrical tests are run, measuring tens of thousands of parameters, with die that are outside of specified parameters considered as fails. However, conventional test techniques often fall short of guaranteeing acceptable quality levels. Given t... » read more

Making IC Test Faster And More Accessible: Part 1


The fundamental challenges of IC test have been the same for a long time. At the heart of all test strategies is controllability and observability. First, control the state of the chip with known test vectors and then observe the chip to determine if it exhibits good or faulty behavior. There have been many innovations over the years to make the required testing of chips more tractable. Thanks ... » read more

Making Chips To Last Their Expected Lifetimes


Chips are supposed to last their lifetime, but that expectation varies greatly depending upon the end market, whether the device is used for safety- or mission-critical applications, and even whether it can be easily replaced or remotely fixed. It also depends on how those chips are used, whether they are an essential part of a complex system, and whether the cost of continual monitoring and... » read more

Why Data Format Slows Chip Manufacturing Progress


The Standard Test Data Format (STDF), a workhorse data format used to pull test results data from automated test equipment, is running out of steam after 35 years. It is unable to keep up with the explosive increase in data generated by more sensors in various semiconductor manufacturing processes. First developed in 1985 by Teradyne, STDF is a binary format that is translated into ASCII or ... » read more

Reliability Over Time And Space


The demand for known good die is well understood as multi-chip packages are used in safety-critical and mission-critical applications, but that alone isn't sufficient. As chips are swapped in and out of packages to customize them for specific applications, it will be the entire module that needs to be verified, simulated and tested, and analyzed. This is more complicated than it sounds for s... » read more

Demand Grows For Reducing PCB Defects


Board manufacturers are boosting their investment in inspection, test and analytics to meet the increasingly stringent demands for reliability in safety-critical sectors like automotive. This represents a significant shift from the past, where concerns about reliability primarily targeted the devices connected to printed circuit boards. But as SoCs become disaggregated into advanced packages... » read more

From Design To Deployment: How Silicon Lifecycle Management Optimizes The Entire IC Life Span


The beginning of the IC journey gets most of the attention in the semiconductor world – the challenges of design, test and manufacturing. But the reality is the entire lifecycle of a chip needs attention, requiring ways to ensure a chip’s intended and ongoing operation, especially in ever-changing operating environments where chips ultimately reside. The growing complexity of today’s e... » read more

Scramble For The White Space


Chipmakers are pushing to utilize more of the unused portion of a design for different functions, reducing margin in the rest of the chip to more clearly define that white space. White space typically is used to relieve back-end routing congestion before all of the silicon area is used up. But a significant amount of space still remain unused. That provides an opportunity for inserting monit... » read more

Eliminating Ground-Loop Induced Noise


As semiconductor device performance increases, especially for low power and higher speed ICs, testing low frequency 1/f, RTN and phase noise with improved signal-to-noise ratio is required. Finding and eliminating unwanted noise is required in multiple areas. Noise sources can be found inside a prober, outside a prober, and in a measurement TestCell. Historically, TestCell-generated noise was o... » read more

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