Akshay Sarup

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Akshay Sarup is a Product Engineer for CXL and PCIe at Mentor, A Siemens Business, focusing on deployment and product definition of Questa Verification IP. Sarup has over 20 years of experience in the functional verification domain, with a background in developing industry standard interface protocols using the UVM methodology.

Author's Latest Posts

Accelerating Simulation Of PCIe Controllers For DMA Applications

By Akshay Sarup - 10 Sep, 2020 - Comments: 0

For memory-intensive and high-performance computing, direct memory access (DMA) is indispensable. A typical DMA operation in PCI Express (PCIe) entails the transfer of data from the system memory to end point devices using a point-to-point PCIe bus to reduce latency and increase memory access throughput between the CPU and the device. Verification of DMA engines is concentrated on the data t... » read more

How UVM Callbacks Simplify Assertion Validation

By Akshay Sarup - 13 Aug, 2020 - Comments: 0

By Akshay Sarup and Mark Olen Assertions bring immediate benefits to the whole design and verification cycle; thus any challenges engineers face in coding and testing them are worth resolving. When a large number of assertions are to be validated, callbacks save time by eliminating the need to code a new sequence for each scenario. Callbacks also provide more dynamic and fine-grained cont... » read more