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Laura Peters

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Laura Peters is the executive editor for manufacturing and test at Semiconductor Engineering.

Author's Latest Posts

New Insights Into IC Process Defectivity
By Laura Peters - 07 Nov, 2023 - Comments: 1

Finding critical defects in manufacturing is becoming more difficult due to tighter design margins, new processes, and shorter process windows. Process marginality and parametric outliers used to be problematic at each new node, but now they are persistent problems at several nodes and in advanced packaging, where there may be a mix of different technologies. In addition, there are more proc... » read more

Gearing Up For Hybrid Bonding
By Laura Peters - 23 Oct, 2023 - Comments: 2

Hybrid bonding is becoming the preferred approach to making heterogeneous integration work, as the semiconductor industry shifts its focus from 2D scaling to 3D scaling. By stacking chiplets vertically in direct wafer-to-wafer bonds, chipmakers can leapfrog attainable interconnection pitch from 35µm in copper micro-bumps to 10µm or less. That reduces signal delay to negligible levels and e... » read more

Using Smart Data To Boost Semiconductor Reliability
By Laura Peters - 10 Oct, 2023 - Comments: 0

The chip industry is looking to AI and data analytics to improve yield, operational efficiency, and reduce the overall cost of designing and manufacturing complex devices. In fact, SEMI estimates its members could capture more than $60B in revenues associated through smart data use and AI. Getting there, however, requires overcoming a number of persistent obstacles. Smart data utilization is... » read more

Building Better Bridges In Advanced Packaging
By Laura Peters - 21 Sep, 2023 - Comments: 1

The increasing challenges and rising cost of logic scaling, along with demands for an increasing number of features, are pushing more companies into advanced packaging. And while that opens up a slew of new options, it also is causing widespread confusion over what works best for different processes and technologies. At its core, advanced packaging depends on reliable interconnects, well-def... » read more

Power Semis Usher In The Silicon Carbide Era
By Laura Peters - 21 Aug, 2023 - Comments: 1

Silicon carbide production is ramping quickly, driven by end market demand in automotive and price parity with silicon. Many thousands of power semiconductor modules already are in use in electric vehicles for on-board charging, traction inversion, and DC-to-DC conversion. Today, most of those are fabricated using silicon-based IGBTs. A shift to silicon carbide-based MOSFETs doubles the powe... » read more

Mission-Critical Devices Drive System-Level Test Expansion
By Laura Peters - 11 Jul, 2023 - Comments: 0

System-level testing is becoming essential for testing complex and increasingly heterogeneous chips, driven by rising demand for reliable parts in safety- and mission-critical applications. More and more chip manufacturers are jumping on the SLT bandwagon for high-volume manufacturing (HVM) of these devices. Unlike ATE and packaged device testing, SLT mimics actual semiconductor system opera... » read more

Balancing AI And Engineering Expertise In The Fab
By Laura Peters - 28 Jun, 2023 - Comments: 1

Modeling and simulation are playing increasingly critical roles in chip development due to tighter process specs, shrinking process windows, and fierce competition to bring technologies to market first. Before a new device makes it to high-volume manufacturing, there are countless engineering hours spent on developing the lithography, etching, deposition, CMP, and many other processes, at hi... » read more

Journey From Cell-Aware To Device-Aware Testing Begins
By Laura Peters - 06 Jun, 2023 - Comments: 0

Early results of using device-aware testing on alternative memories show expanded test coverage, but this is just the start. Once the semiconductor industry realized that it was suffering from device failures even when test programs achieved 100% fault coverage, it went about addressing this disconnect between the way defects manifest themselves inside devices and the commonly used fault mod... » read more

Etch Processes Push Toward Higher Selectivity, Cost Control
By Laura Peters - 18 May, 2023 - Comments: 0

Plasma etching is perhaps the most essential process in semiconductor manufacturing, and possibly the most complex of all fab operations next to photolithography. Nearly half of all fab steps rely on a plasma, an energetic ionized gas, to do their work. Despite ever-shrinking transistor and memory cells, engineers continue to deliver reliable etch processes. “To sustainably create chips... » read more

How Metrology Tools Stack Up In 3D NAND Devices
By Laura Peters - 15 May, 2023 - Comments: 0

Multiple innovations in semiconductor processing are needed to enable 3D NAND bit density increases of about 30% per year at ever-decreasing cost per bit, all of which will be required to meet the nonvolatile storage needs of the big data era. 3D NAND is the first truly three-dimensional device in production. It is both a technology driver for new metrology methods and a significant part of ... » read more

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